[U-Boot] [PATCH v2 01/16] drivers: spi: ti_qspi: do not hard code chip select for memory map configuration

[Simon Glass]

On 4 November 2015 at 01:16, Mugunthan V N <mugunthanvnm at ti.com> wrote:
> To enable memory map in dra7xx, specific chip select must be
> written to control module register. But this hard coded to chip
> select 1, fixing it by writing the specific chip select value to
> control module register.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm at ti.com>
> ---
>  drivers/spi/ti_qspi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass <sjg at chromium.org>

But maybe it would be better to just drop the MEM_CS macro.

>
> diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
> index ecd9d78..36bf206 100644
> --- a/drivers/spi/ti_qspi.c
> +++ b/drivers/spi/ti_qspi.c
> @@ -41,7 +41,7 @@
>  #define QSPI_WC_BUSY                    (QSPI_WC | QSPI_BUSY)
>  #define QSPI_XFER_DONE                  QSPI_WC
>  #define MM_SWITCH                       0x01
> -#define MEM_CS                          0x100
> +#define MEM_CS(cs)                      ((cs + 1) << 8)
>  #define MEM_CS_UNSELECT                 0xfffff0ff
>  #define MMAP_START_ADDR_DRA            0x5c000000
>  #define MMAP_START_ADDR_AM43x          0x30000000
> @@ -265,7 +265,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
>                 writel(MM_SWITCH, &qslave->base->memswitch);
>  #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
>                 val = readl(CORE_CTRL_IO);
> -               val |= MEM_CS;
> +               val |= MEM_CS(slave->cs);
>                 writel(val, CORE_CTRL_IO);
>  #endif
>                 return 0;
> --
> 2.6.2.280.g74301d6
>

Regards,
Simon