[U-Boot] [PATCH 08/10] x86: Convert to use driver model timer

[Bin Meng]

Hi Simon,

On Fri, Nov 6, 2015 at 8:08 PM, Simon Glass <sjg at chromium.org> wrote:
> Hi Bin,
>
> On 5 November 2015 at 06:02, Bin Meng <bmeng.cn at gmail.com> wrote:
>> Convert all x86 boards to use driver model tsc timer.
>>
>> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>> ---
>>
>>  arch/x86/cpu/baytrail/valleyview.c  |  3 ---
>>  arch/x86/cpu/coreboot/timestamp.c   | 22 ----------------------
>>  arch/x86/cpu/efi/efi.c              |  4 ----
>>  arch/x86/cpu/ivybridge/cpu.c        |  1 -
>>  arch/x86/cpu/qemu/qemu.c            |  3 ---
>>  arch/x86/cpu/quark/quark.c          |  3 ---
>>  arch/x86/cpu/queensbay/tnc.c        |  3 ---
>>  arch/x86/dts/bayleybay.dts          |  1 +
>>  arch/x86/dts/broadwell_som-6896.dts |  1 +
>>  arch/x86/dts/chromebook_link.dts    |  1 +
>>  arch/x86/dts/chromebox_panther.dts  |  1 +
>>  arch/x86/dts/crownbay.dts           |  1 +
>>  arch/x86/dts/efi.dts                |  5 +++++
>>  arch/x86/dts/galileo.dts            |  5 +++++
>>  arch/x86/dts/minnowmax.dts          |  1 +
>>  arch/x86/dts/qemu-x86_i440fx.dts    |  5 +++++
>>  arch/x86/dts/qemu-x86_q35.dts       |  5 +++++
>>  arch/x86/dts/tsc_timer.dtsi         |  7 +++++++
>>  configs/bayleybay_defconfig         |  1 +
>>  configs/chromebook_link_defconfig   |  2 +-
>>  configs/chromebox_panther_defconfig |  2 +-
>>  configs/coreboot-x86_defconfig      |  2 +-
>>  configs/crownbay_defconfig          |  1 +
>>  configs/efi-x86_defconfig           |  1 +
>>  configs/galileo_defconfig           |  1 +
>>  configs/minnowmax_defconfig         |  1 +
>>  configs/qemu-x86_defconfig          |  1 +
>>  27 files changed, 42 insertions(+), 42 deletions(-)
>>  create mode 100644 arch/x86/dts/tsc_timer.dtsi
>>
>> diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
>> index a009c14..9b30451 100644
>> --- a/arch/x86/cpu/baytrail/valleyview.c
>> +++ b/arch/x86/cpu/baytrail/valleyview.c
>> @@ -28,9 +28,6 @@ int arch_cpu_init(void)
>>         int ret;
>>
>>         post_code(POST_CPU_INIT);
>> -#ifdef CONFIG_SYS_X86_TSC_TIMER
>> -       timer_set_base(rdtsc());
>> -#endif
>>
>>         ret = x86_cpu_init_f();
>>         if (ret)
>> diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
>> index 0edee6b..b382795 100644
>> --- a/arch/x86/cpu/coreboot/timestamp.c
>> +++ b/arch/x86/cpu/coreboot/timestamp.c
>> @@ -27,28 +27,6 @@ static struct timestamp_table *ts_table  __attribute__((section(".data")));
>>
>>  void timestamp_init(void)
>>  {
>> -#ifdef CONFIG_SYS_X86_TSC_TIMER
>> -       uint64_t base_time;
>> -#endif
>> -
>> -       ts_table = lib_sysinfo.tstamp_table;
>> -#ifdef CONFIG_SYS_X86_TSC_TIMER
>> -       /*
>> -        * If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value
>> -        * of base_time in coreboot's timestamp table as our timer base,
>> -        * otherwise TSC counter value will be used.
>> -        *
>> -        * Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS,
>> -        * the value of base_time in the timestamp table is still zero, so
>> -        * we must exclude this case too (this is currently seen on booting
>> -        * coreboot in qemu)
>> -        */
>> -       if (ts_table && ts_table->base_time)
>> -               base_time = ts_table->base_time;
>> -       else
>> -               base_time = rdtsc();
>> -       timer_set_base(base_time);
>> -#endif
>
> Where does this code end up now? It seems to be deleted.
>

The TSC base was saved when TSC timer driver is probed. Please see
tsc_timer.c::tsc_timer_probe().

Regards,
Bin