[U-Boot] [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514

Yao Yuan yao.yuan at freescale.com
Tue Nov 10 14:18:42 CET 2015


Thanks york,

So it seems I should moving the workaround out of DDR driver in "gen4" to SoC.
I think the workaround is not just only for ddr4.
And It should be as a workaround for the SOC.

________________________________________
From: York Sun <yorksun at freescale.com>
Sent: Tuesday, November 10, 2015 1:01
To: Yuan Yao-B46683
Cc: Wang Huan-B18965; u-boot at lists.denx.de
Subject: Re: [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514

On 11/09/2015 01:30 AM, Yuan Yao-B46683 wrote:
> Hi york,
>
> Is it for DDR4?
> LS1021A doesn't use this file.

LS1021A support both DDR3 and DDR4. DDR4 mode uses this driver, doesn't it?
My concern is if the workaround is implemented in different places, it will be
harder to maintain in future versions fix this erratum. Maybe moving the
workaround out of DDR driver to SoC is not a bad idea.

York


>
> Best Regards,
> Yuan Yao
>
>> -----Original Message-----
>> From: York Sun [mailto:yorksun at freescale.com]
>> Sent: Friday, November 06, 2015 2:05 AM
>> To: Yuan Yao-B46683 <yao.yuan at freescale.com>
>> Cc: Wang Huan-B18965 <alison.wang at freescale.com>; u-boot at lists.denx.de
>> Subject: Re: [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum
>> A008514
>>
>>
>>
>> On 11/05/2015 02:26 AM, Yuan Yao wrote:
>>> This is a workaround for hardware erratum.
>>> Write the value of 63b2_0002h to EDDRTQCFG will optimal the memory
>>> controller performance.
>>>
>>> The value: 63b2_0002h comes from the hardware team.
>>>
>>> Signed-off-by: Yuan Yao <yao.yuan at freescale.com>
>>> ---
>>> Changes in v2:
>>> Rewrite the commit message to explain why and what this patch does.
>>> ---
>>>  arch/arm/cpu/armv7/ls102xa/soc.c                  | 10 ++++++++++
>>>  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  2 +-
>>>  2 files changed, 11 insertions(+), 1 deletion(-)
>>
>> Workaround for A008514 is already implemented in DDR driver
>> drivers/ddr/fsl/fsl_ddr_gen4.c. Please see if you can merge your workaround
>> into it.
>>
>> York
>


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