[U-Boot] [RFC PATCH v2 0/2] Make most DDR non-secure in MMU while keep a small block secure

[York Sun]

This set is to change MMU tables so DDR is in non-secure mode that
non-secure master such as SDHC DMA can access the data. To mix
secure and non-secure MMU entries, the MMU tables themselves have
to be in secure memory. A small portion memory is reserved at the
end of DDR (before debug server and MC) to host secure application
and the MMU tables.

This is different from existing armv7 secure_ram_addr() solution.
U-boot can run in the middle of memory if the memory is large.
Having security memory at the very end simplifies MMU setup.

Changes in v2:
  Do not use CONFIG_SYS_MEM_TOP_HIDE mechanism
  Move gd->arch.secure_ram to gd->secure_ram.
  Change the calculation of gd->secure_ram accordingly.
  Chnage commit message slightly accordingly.

Changes in v1:
  Initial patch.
  Depends on http://patchwork.ozlabs.org/patch/540248/

York Sun (2):
  Reserve secure memory
  armv8: fsl-layerscape: Make DDR non secure in MMU tables

 README                                         |    8 ++
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c        |  126 ++++++++++++++++++++++--
 arch/arm/include/asm/arch-fsl-layerscape/cpu.h |   12 ++-
 board/freescale/ls2085a/ddr.c                  |   13 +++
 board/freescale/ls2085aqds/ddr.c               |   13 +++
 board/freescale/ls2085ardb/ddr.c               |   13 +++
 common/board_f.c                               |    9 ++
 common/cmd_bdinfo.c                            |    4 +
 include/asm-generic/global_data.h              |    1 +
 include/configs/ls2085a_common.h               |    6 ++
 10 files changed, 192 insertions(+), 13 deletions(-)

-- 
1.7.9.5