[U-Boot] [PATCH v2 10/11] x86: tsc: Remove legacy timer codes
Bin Meng
bmeng.cn at gmail.com
Fri Nov 13 08:59:46 CET 2015
Now that we have converted all x86 boards to use driver model timer,
remove these legacy timer codes in the tsc driver.
Note this also removes the TSC_CALIBRATION_BYPASS Kconfig option,
as it is not needed with driver model.
Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
Acked-by: Simon Glass <sjg at chromium.org>
---
Changes in v2: None
arch/x86/Kconfig | 20 --------------
arch/x86/cpu/qemu/Kconfig | 1 -
arch/x86/cpu/quark/Kconfig | 5 ----
arch/x86/include/asm/global_data.h | 1 -
arch/x86/lib/tsc_timer.c | 53 --------------------------------------
configs/coreboot-x86_defconfig | 1 -
configs/efi-x86_defconfig | 1 -
7 files changed, 82 deletions(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 8914be3..fef5601 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -279,26 +279,6 @@ config AP_STACK_SIZE
the memory used by this initialisation process. Typically 4KB is
enough space.
-config TSC_CALIBRATION_BYPASS
- bool "Bypass Time-Stamp Counter (TSC) calibration"
- default n
- help
- By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
- running frequency via Model-Specific Register (MSR) and Programmable
- Interval Timer (PIT). If the calibration does not work on your board,
- select this option and provide a hardcoded TSC running frequency with
- CONFIG_TSC_FREQ_IN_MHZ below.
-
- Normally this option should be turned on in a simulation environment
- like qemu.
-
-config TSC_FREQ_IN_MHZ
- int "Time-Stamp Counter (TSC) running frequency in MHz"
- depends on TSC_CALIBRATION_BYPASS
- default 1000
- help
- The running frequency in MHz of Time-Stamp Counter (TSC).
-
config HAVE_VGA_BIOS
bool "Add a VGA BIOS image"
help
diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig
index fb775d7..4f98621 100644
--- a/arch/x86/cpu/qemu/Kconfig
+++ b/arch/x86/cpu/qemu/Kconfig
@@ -6,7 +6,6 @@
config QEMU
bool
- select TSC_CALIBRATION_BYPASS
if QEMU
diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig
index bc961ef..163caac 100644
--- a/arch/x86/cpu/quark/Kconfig
+++ b/arch/x86/cpu/quark/Kconfig
@@ -7,7 +7,6 @@
config INTEL_QUARK
bool
select HAVE_RMU
- select TSC_CALIBRATION_BYPASS
if INTEL_QUARK
@@ -119,8 +118,4 @@ config SYS_CAR_SIZE
Space in bytes in eSRAM used as Cache-As-ARM (CAR).
Note this size must not exceed eSRAM's total size.
-config TSC_FREQ_IN_MHZ
- int
- default 400
-
endif
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 5966b7c..0ca518c 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -54,7 +54,6 @@ struct arch_global_data {
uint8_t x86_mask;
uint32_t x86_device;
uint64_t tsc_base; /* Initial value returned by rdtsc() */
- uint32_t tsc_mhz; /* TSC frequency in MHz */
void *new_fdt; /* Relocated FDT */
uint32_t bist; /* Built-in self test value */
enum pei_boot_mode_t pei_boot_mode;
diff --git a/arch/x86/lib/tsc_timer.c b/arch/x86/lib/tsc_timer.c
index 4a95959..6aa2437 100644
--- a/arch/x86/lib/tsc_timer.c
+++ b/arch/x86/lib/tsc_timer.c
@@ -280,63 +280,12 @@ success:
return delta / 1000;
}
-#ifndef CONFIG_TIMER
-void timer_set_base(u64 base)
-{
- gd->arch.tsc_base = base;
-}
-
-/*
- * Get the number of CPU time counter ticks since it was read first time after
- * restart. This yields a free running counter guaranteed to take almost 6
- * years to wrap around even at 100GHz clock rate.
- */
-u64 notrace get_ticks(void)
-{
- u64 now_tick = rdtsc();
-
- /* We assume that 0 means the base hasn't been set yet */
- if (!gd->arch.tsc_base)
- panic("No tick base available");
- return now_tick - gd->arch.tsc_base;
-}
-#endif /* CONFIG_TIMER */
-
/* Get the speed of the TSC timer in MHz */
unsigned notrace long get_tbclk_mhz(void)
{
-#ifdef CONFIG_TIMER
return get_tbclk() / 1000000;
-#else
- unsigned long fast_calibrate;
-
- if (gd->arch.tsc_mhz)
- return gd->arch.tsc_mhz;
-
-#ifdef CONFIG_TSC_CALIBRATION_BYPASS
- fast_calibrate = CONFIG_TSC_FREQ_IN_MHZ;
-#else
- fast_calibrate = try_msr_calibrate_tsc();
- if (!fast_calibrate) {
-
- fast_calibrate = quick_pit_calibrate();
- if (!fast_calibrate)
- panic("TSC frequency is ZERO");
- }
-#endif
-
- gd->arch.tsc_mhz = fast_calibrate;
- return fast_calibrate;
-#endif
}
-#ifndef CONFIG_TIMER
-unsigned long get_tbclk(void)
-{
- return get_tbclk_mhz() * 1000 * 1000;
-}
-#endif
-
static ulong get_ms_timer(void)
{
return (get_ticks() * 1000) / get_tbclk();
@@ -386,7 +335,6 @@ int timer_init(void)
return 0;
}
-#ifdef CONFIG_TIMER
static int tsc_timer_get_count(struct udevice *dev, u64 *count)
{
u64 now_tick = rdtsc();
@@ -439,4 +387,3 @@ U_BOOT_DRIVER(tsc_timer) = {
.ops = &tsc_timer_ops,
.flags = DM_FLAG_PRE_RELOC,
};
-#endif /* CONFIG_TIMER */
diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 3f2cff8..6fb38f0 100644
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -1,7 +1,6 @@
CONFIG_X86=y
CONFIG_VENDOR_COREBOOT=y
CONFIG_TARGET_COREBOOT=y
-CONFIG_TSC_CALIBRATION_BYPASS=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig
index fd90739..7354f04 100644
--- a/configs/efi-x86_defconfig
+++ b/configs/efi-x86_defconfig
@@ -2,7 +2,6 @@ CONFIG_X86=y
CONFIG_VENDOR_EFI=y
CONFIG_DEFAULT_DEVICE_TREE="efi"
CONFIG_TARGET_EFI=y
-CONFIG_TSC_CALIBRATION_BYPASS=y
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_NET is not set
CONFIG_OF_CONTROL=y
--
1.8.2.1
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