[U-Boot] [PATCH 02/10] sunxi: Add support for UART0 in PB pin group on A83T
Hans de Goede
hdegoede at redhat.com
Fri Nov 13 18:19:34 CET 2015
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
> On A83T, PB9,PB10 are UART0 pins.
> On allwinner A83T Dev board(h8homlet), this uart0 serial connector
> is exposed.
>
> Signed-off-by: Vishnu Patekar <vishnupatekar0510 at gmail.com>
This one looks good as is.
Regards,
Hans
> ---
> arch/arm/cpu/armv7/sunxi/board.c | 4 ++++
> arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
> index 4785ac6..348f028 100644
> --- a/arch/arm/cpu/armv7/sunxi/board.c
> +++ b/arch/arm/cpu/armv7/sunxi/board.c
> @@ -72,6 +72,10 @@ static int gpio_init(void)
> sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_A33_GPB_UART0);
> sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_A33_GPB_UART0);
> sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
> +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_A83T)
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0);
> + sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0);
> + sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP);
> #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I)
> sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
> sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 8382101..14a3328 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -157,6 +157,7 @@ enum sunxi_gpio_number {
> #define SUN5I_GPB_UART0 2
> #define SUN8I_GPB_UART2 2
> #define SUN8I_A33_GPB_UART0 3
> +#define SUN8I_A83T_GPB_UART0 2
>
> #define SUNXI_GPC_NAND 2
> #define SUNXI_GPC_SDC2 3
>
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