[U-Boot] [PATCH 06/10] sunxi: clk: add basic clocks for A83T

Chen-Yu Tsai wens at csie.org
Sun Nov 15 03:10:57 CET 2015


Hi,

On Sun, Nov 15, 2015 at 2:47 AM, Vishnu Patekar
<vishnupatekar0510 at gmail.com> wrote:
> Hello,
>
> On Sat, Nov 14, 2015 at 1:25 AM, Hans de Goede <hdegoede at redhat.com> wrote:
>> Hi,
>>
>> On 12-11-15 19:09, Vishnu Patekar wrote:
>>>
>>> Add basic clocks pll1, pll5, and some default values from allwinner
>>> u-boot.
>>>
>>> Signed-off-by: Vishnu Patekar <vishnupatekar0510 at gmail.com>
>>
>>
>> This one looks good as is.
> I'm going to increase the PLL6 clock as same as allwinner u-boot, i.e. 1200MHz.
>
> How can we know that pll6's safe range. as per data sheet, multiplier
> can be 12 to 255.
> But, 24*255 Mhz is not realistic.

You probably shouldn't. The user manual says that the PLL should be 600 MHz.
The default value of 0x00001900 is also 600 MHz, only turned off.

ChenYu


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