[U-Boot] [PATCH 16/25] dm: x86: Convert x86 PCI functions over to DM PCI API

[Simon Glass]

Adjust these functions to use the driver model PCI API functions. At some
point we should be able to remove these by requiring the caller to obtain
the PCI bus and pass it to pci_bus_read/write_config(), or have a device
driver and use dm_pci_config_read/write...().

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/x86/cpu/pci.c | 35 +++++++++++++++++++++++------------
 1 file changed, 23 insertions(+), 12 deletions(-)

diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index 7a31260..f50183a 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -19,19 +19,30 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static struct pci_controller *get_hose(void)
+/*
+ * TODO(sjg at chromium.org): Drop use of the x86_pci_read/write_config<n>()
+ * functions from x86 code, and use dm_pci_read/write_config<n> instead.
+ */
+static struct udevice *get_ctlr(void)
 {
+	struct udevice *dev;
+	int ret;
+
 	if (gd->hose)
-		return gd->hose;
+		return gd->hose->ctlr;
+
+	ret = uclass_first_device(UCLASS_PCI, &dev);
+	if (ret)
+		return ERR_PTR(ret);
 
-	return pci_bus_to_hose(0);
+	return dev;
 }
 
 unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where)
 {
-	uint8_t value;
+	ulong value;
 
-	if (pci_hose_read_config_byte(get_hose(), dev, where, &value))
+	if (pci_bus_read_config(get_ctlr(), dev, where, &value, PCI_SIZE_8))
 		return -1U;
 
 	return value;
@@ -39,9 +50,9 @@ unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where)
 
 unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where)
 {
-	uint16_t value;
+	ulong value;
 
-	if (pci_hose_read_config_word(get_hose(), dev, where, &value))
+	if (pci_bus_read_config(get_ctlr(), dev, where, &value, PCI_SIZE_16))
 		return -1U;
 
 	return value;
@@ -49,9 +60,9 @@ unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where)
 
 unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where)
 {
-	uint32_t value;
+	ulong value;
 
-	if (pci_hose_read_config_dword(get_hose(), dev, where, &value))
+	if (pci_bus_read_config(get_ctlr(), dev, where, &value, PCI_SIZE_32))
 		return -1U;
 
 	return value;
@@ -59,17 +70,17 @@ unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where)
 
 void x86_pci_write_config8(pci_dev_t dev, unsigned where, unsigned value)
 {
-	pci_hose_write_config_byte(get_hose(), dev, where, value);
+	pci_bus_write_config(get_ctlr(), dev, where, value, PCI_SIZE_8);
 }
 
 void x86_pci_write_config16(pci_dev_t dev, unsigned where, unsigned value)
 {
-	pci_hose_write_config_word(get_hose(), dev, where, value);
+	pci_bus_write_config(get_ctlr(), dev, where, value, PCI_SIZE_16);
 }
 
 void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value)
 {
-	pci_hose_write_config_dword(get_hose(), dev, where, value);
+	pci_bus_write_config(get_ctlr(), dev, where, value, PCI_SIZE_32);
 }
 
 int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
-- 
2.6.0.rc2.230.g3dd15c0