[U-Boot] [PATCH] Revert "net: phy: delay only if reset handler is registered"

[Fabio Estevam]

Hi Jörg,

On Wed, Nov 18, 2015 at 6:44 AM, Jörg Krause
<joerg.krause at embedded.rocks> wrote:

> I think this is not the right thing to do here. It is true that the
> AR8035 ethernet chip of the RioTboard needs the clock to be stable for
> at least 1ms before RESET can be deasserted. This why it fails, if
> there is no MII reset function defined.

In my case I am testing on a mx6sxsabresd which has two AR8031 chips.

>
> I think the right place to handle reset delays is the board_eth_init().
> The value of 15ms currently used looks to me like an arbitrary value. I
> am not sure where this value is comming from. Some chips need more,
> some less time to delay after a reset.
>
> This is snippet of how I do it for a custom i.MX28-EVK-based board:
>
> int board_eth_init(bd_t *bis) {
>   cpu_eth_init(bis);
>   /* Power-on FEC */
>   gpio_direction_output(MX28_PAD_LCD_D21__GPIO_1_21, 0);
>   /* Reset FEC PHY */
>   gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
>   /* Deassert nRST after 25 ms from power-up on (= t_purstd) */
>   udelay(25000);
>   gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
>   fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
> }

We currently reset the Ethernet PHY inside setup_fec() inside board_eth_init().

Please check board/freescale/mx6sxsabresd/mx6sxsabresd.c.

I have also tried increasing the reset time and still do not have
Ethernel functional.

Regards,

Fabio Estevam