[U-Boot] [PATCH] eth: dtsec: fix TBI ANA setting bug in dtsec_configure_serdes()

[York Sun]

+ Experts

On 11/24/2015 11:04 PM, Yuanzheng Li wrote:
> The TBI_ANA register is configurated with the wrong value 0x4001, refer
> to QorIQ Data Path Acceleration Architecture (DPAA) Reference Manual.
> It set the reserved areas, bit 1 and bit 11 to bit 15 in big endian,
> which should be cleared. But the normal functions of the auto-negotiation,
> e.g. Pause and Full Duplex, do not be set.
> 
> There is no problem in the p2041rdb board, because the ppc is connected
> directly with the phy chip which support auto-negotiation by default in
> SGMII interface. But the link problem will occur when it is connected with
> a switch chip like BCM5389, the switch chip disable auto-negotiation by
> default, and the ppc also disable auto-negotiation, then there is no link
> between them.
> 
> So use the vlue TBIANA_SETTINGS to enable the ppc's auto-negotiation.
> 
> Signed-off-by: Yuanzheng Li <liyuanzheng01 at 163.com>
> Cc: York Sun <yorksun at freescale.com>
> ---
>  drivers/net/fm/eth.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
> index eb8e936..78c0988 100644
> --- a/drivers/net/fm/eth.c
> +++ b/drivers/net/fm/eth.c
> @@ -81,7 +81,7 @@ qsgmii_loop:
>  	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_TBICON,
>  			TBICON_CLK_SELECT);
>  	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0, TBI_ANA,
> -			TBIANA_SGMII_ACK);
> +			TBIANA_SETTINGS);
>  	tsec_local_mdio_write(phyregs, in_be32(&regs->tbipa), 0,
>  			TBI_CR, TBICR_SETTINGS);
>  #endif
> 

Yuanzheng,

After your change, TBIANA_SGMII_ACK is not used and should be removed.

Shaohui and Codrin,

Please comment.

York