[U-Boot] [PATCH v2 3/4] x86: Remove CPU_INTEL_SOCKET_RPGA989

[Bin Meng]

This Kconfig option name indicates it has something to do with cpu
socket, however it is actually not the case. Remove it and move
options inside it to NORTHBRIDGE_INTEL_IVYBRIDGE.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
Acked-by: Simon Glass <sjg at chromium.org>
---

Changes in v2: None

 arch/x86/cpu/ivybridge/Kconfig         | 15 ++++-----------
 board/google/chromebook_link/Kconfig   |  1 -
 board/google/chromebox_panther/Kconfig |  1 -
 3 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index 0970382..56abd8f 100644
--- a/arch/x86/cpu/ivybridge/Kconfig
+++ b/arch/x86/cpu/ivybridge/Kconfig
@@ -11,6 +11,10 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
 
 if NORTHBRIDGE_INTEL_IVYBRIDGE
 
+config CACHE_MRC_BIN
+	bool
+	default n
+
 config CACHE_MRC_SIZE_KB
 	int
 	default 512
@@ -69,14 +73,3 @@ config ENABLE_VMX
 	  slowly.
 
 endif
-
-config CPU_INTEL_SOCKET_RPGA989
-	bool
-
-if CPU_INTEL_SOCKET_RPGA989
-
-config CACHE_MRC_BIN
-	bool
-	default n
-
-endif
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig
index 3843517..ce976db 100644
--- a/board/google/chromebook_link/Kconfig
+++ b/board/google/chromebook_link/Kconfig
@@ -18,7 +18,6 @@ config SYS_TEXT_BASE
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select X86_RESET_VECTOR
-	select CPU_INTEL_SOCKET_RPGA989
 	select NORTHBRIDGE_INTEL_IVYBRIDGE
 	select HAVE_ACPI_RESUME
 	select BOARD_ROMSIZE_KB_8192
diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig
index 88afff3..c1cf89c 100644
--- a/board/google/chromebox_panther/Kconfig
+++ b/board/google/chromebox_panther/Kconfig
@@ -19,7 +19,6 @@ config SYS_TEXT_BASE
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select X86_RESET_VECTOR
-	select CPU_INTEL_SOCKET_RPGA989
 	select NORTHBRIDGE_INTEL_IVYBRIDGE
 	select HAVE_ACPI_RESUME
 	select BOARD_ROMSIZE_KB_8192
-- 
1.8.2.1