[U-Boot] [PATCH v3 2/2] arm: socfpga: dts: Adding drvsel and smplsel to dts

[Chin Liang See]

Adding new node drvsel and smplsel for SDMMC

Signed-off-by: Chin Liang See <clsee at altera.com>
Cc: Dinh Nguyen <dinguyen at opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux at gmail.com>
Cc: Pavel Machek <pavel at denx.de>
Cc: Marek Vasut <marex at denx.de>
Cc: Stefan Roese <sr at denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou at konsulko.com>
Cc: Simon Glass <sjg at chromium.org>
Cc: Jaehoon Chung <jh80.chung at samsung.com>
---
Changes for v3
- Split patch to separte DTS and driver patches
---
 arch/arm/dts/socfpga_arria5.dtsi   | 2 ++
 arch/arm/dts/socfpga_cyclone5.dtsi | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/dts/socfpga_arria5.dtsi b/arch/arm/dts/socfpga_arria5.dtsi
index 5175f03..fa0bd7d 100644
--- a/arch/arm/dts/socfpga_arria5.dtsi
+++ b/arch/arm/dts/socfpga_arria5.dtsi
@@ -25,6 +25,8 @@
 			bus-width = <4>;
 			cap-mmc-highspeed;
 			cap-sd-highspeed;
+			drvsel = <3>;
+			smplsel = <0>;
 		};
 
 		sysmgr at ffd08000 {
diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi
index de36209..040b236 100644
--- a/arch/arm/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5.dtsi
@@ -25,6 +25,8 @@
 			bus-width = <4>;
 			cap-mmc-highspeed;
 			cap-sd-highspeed;
+			drvsel = <3>;
+			smplsel = <0>;
 		};
 
 		sysmgr at ffd08000 {
-- 
2.2.0