[U-Boot] [PATCH v2 1/3] Revert "rockchip: Add max spl size & spl header configs"
Jeffy Chen
jeffy.chen at rock-chips.com
Fri Nov 27 05:07:16 CET 2015
This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e
Conflicts:
tools/rkcommon.h
Signed-off-by: Jeffy Chen <jeffy.chen at rock-chips.com>
---
Changes in v2:
- Fix some coding style
arch/arm/mach-rockchip/Kconfig | 15 ---------------
arch/arm/mach-rockchip/rk3036/Kconfig | 6 ------
arch/arm/mach-rockchip/rk3288/Kconfig | 6 ------
tools/Makefile | 8 +-------
tools/rkcommon.c | 2 +-
tools/rkimage.c | 2 +-
tools/rksd.c | 4 ++--
tools/rkspi.c | 4 ++--
8 files changed, 7 insertions(+), 40 deletions(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ccff81a..746d9f6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -17,21 +17,6 @@ config ROCKCHIP_RK3036
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
-config ROCKCHIP_SPL_HDR
- string "Header of rockchip's spl loader"
- help
- Rockchip's bootrom requires the spl loader to start with a 4-bytes
- header. The content of this header depends on the chip type.
-
-config ROCKCHIP_MAX_SPL_SIZE
- hex "Max size of rockchip's spl loader"
- help
- Different chip may have different sram size. And if we want to jump
- back to the bootrom after spl, we may need to reserve some sram space
- for the bootrom.
- The max spl loader size should be sram size minus reserved
- size(if needed)
-
config SYS_MALLOC_F
default y
diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
index 95fb2b9..0fbc58e 100644
--- a/arch/arm/mach-rockchip/rk3036/Kconfig
+++ b/arch/arm/mach-rockchip/rk3036/Kconfig
@@ -9,12 +9,6 @@ config SYS_SOC
config SYS_MALLOC_F_LEN
default 0x400
-config ROCKCHIP_SPL_HDR
- default "RK30"
-
-config ROCKCHIP_MAX_SPL_SIZE
- default 0x1000
-
config ROCKCHIP_COMMON
bool "Support rk common fuction"
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 3de3878..d0a7276 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -16,12 +16,6 @@ config TARGET_CHROMEBOOK_JERRY
WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
the keyboard and battery functions.
-config ROCKCHIP_SPL_HDR
- default "RK32"
-
-config ROCKCHIP_MAX_SPL_SIZE
- default 0x8000
-
config SYS_SOC
default "rockchip"
diff --git a/tools/Makefile b/tools/Makefile
index 117b07e..9082bda 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -64,7 +64,7 @@ RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
rsa-sign.o rsa-verify.o rsa-checksum.o \
rsa-mod-exp.o)
-ROCKCHIP_OBS = $(if $(CONFIG_ARCH_ROCKCHIP),lib/rc4.o rkcommon.o rkimage.o rksd.o,)
+ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o
# common objs for dumpimage and mkimage
dumpimage-mkimage-objs := aisimage.o \
@@ -108,12 +108,6 @@ fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o
# TODO(sjg at chromium.org): Is this correct on Mac OS?
-ifneq ($(CONFIG_ARCH_ROCKCHIP),)
-HOST_EXTRACFLAGS += \
- -DCONFIG_ROCKCHIP_MAX_SPL_SIZE=$(CONFIG_ROCKCHIP_MAX_SPL_SIZE) \
- -DCONFIG_ROCKCHIP_SPL_HDR="\"$(CONFIG_ROCKCHIP_SPL_HDR)\""
-endif
-
ifneq ($(CONFIG_MX23)$(CONFIG_MX28),)
# Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
# the mxsimage support within tools/mxsimage.c .
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 249c862..9e2173f 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -49,7 +49,7 @@ int rkcommon_set_header(void *buf, uint file_size)
{
struct header0_info *hdr;
- if (file_size > CONFIG_ROCKCHIP_MAX_SPL_SIZE)
+ if (file_size > RK_MAX_CODE1_SIZE)
return -ENOSPC;
memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
diff --git a/tools/rkimage.c b/tools/rkimage.c
index 73634e3..7b292f4 100644
--- a/tools/rkimage.c
+++ b/tools/rkimage.c
@@ -30,7 +30,7 @@ static void rkimage_print_header(const void *buf)
static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd,
struct image_tool_params *params)
{
- memcpy(buf, CONFIG_ROCKCHIP_SPL_HDR, 4);
+ memcpy(buf, "RK32", 4);
}
static int rkimage_extract_subimage(void *buf, struct image_tool_params *params)
diff --git a/tools/rksd.c b/tools/rksd.c
index f660d56..39f5c75 100644
--- a/tools/rksd.c
+++ b/tools/rksd.c
@@ -50,7 +50,7 @@ static void rksd_set_header(void *buf, struct stat *sbuf, int ifd,
size);
}
- memcpy(buf + RKSD_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4);
+ memcpy(buf + RKSD_SPL_HDR_START, "RK32", 4);
}
static int rksd_extract_subimage(void *buf, struct image_tool_params *params)
@@ -72,7 +72,7 @@ static int rksd_vrec_header(struct image_tool_params *params,
{
int pad_size;
- pad_size = RKSD_SPL_HDR_START + CONFIG_ROCKCHIP_MAX_SPL_SIZE;
+ pad_size = RKSD_SPL_HDR_START + RK_MAX_CODE1_SIZE;
debug("pad_size %x\n", pad_size);
return pad_size - params->file_size;
diff --git a/tools/rkspi.c b/tools/rkspi.c
index 69a12f0..eb8119b 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -53,7 +53,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
size);
}
- memcpy(buf + RKSPI_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4);
+ memcpy(buf + RKSPI_SPL_HDR_START, "RK32", 4);
/*
* Spread the image out so we only use the first 2KB of each 4KB
@@ -89,7 +89,7 @@ static int rkspi_vrec_header(struct image_tool_params *params,
{
int pad_size;
- pad_size = (CONFIG_ROCKCHIP_MAX_SPL_SIZE + 0x7ff) / 0x800 * 0x800;
+ pad_size = (RK_MAX_CODE1_SIZE + 0x7ff) / 0x800 * 0x800;
params->orig_file_size = pad_size;
/* We will double the image size due to the SPI format */
--
2.1.4
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