[U-Boot] [PATCH][v3] armv8: ls2085a: Add workaround of errata A009635

[York Sun]

On 11/04/2015 10:30 PM, Prabhakar Kushwaha wrote:
> If the core runs at higher than x3 speed of the platform, there is
> possiblity about sev instruction to getting missed by other cores.
> This is because of SoC Run Control block may not able to sample
> the EVENTI(Sev) signals.
> 
> Configure Run Control and EPU to periodically send out EVENTI signals to
> wake up A57 cores.
> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
> ---
> Changes for v2: Updated description
> Changes for v3: Added README and comments
> 
>  arch/arm/cpu/armv8/fsl-layerscape/README.lsch3    | 21 +++++++++++
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c           |  6 ++++
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c           | 43 +++++++++++++++++++++++
>  arch/arm/include/asm/arch-fsl-layerscape/config.h |  9 +++++
>  arch/arm/include/asm/arch-fsl-layerscape/soc.h    |  3 ++
>  5 files changed, 82 insertions(+)
> 

Applied to fsl-qoriq master. Thanks.

York