[U-Boot] [PATCH v2 2/2] usb: eth: add Realtek RTL8152B/RTL8153 driver

Joe Hershberger joe.hershberger at gmail.com
Mon Nov 30 23:07:33 CET 2015


Hi Ted,

On Tue, Nov 24, 2015 at 11:30 PM, Ted Chen <tedchen at realtek.com> wrote:
> From: Ted Chen <tedchen at realtek.com>
>
> This patch adds driver support for the Realtek RTL8152B/RTL8153 USB
> network adapters.
>
> Signed-off-by: Ted Chen <tedchen at realtek.com>
> [swarren, fixed a few compiler warnings]
> [swarren, with permission, converted license header to SPDX]
> [swarren, removed printf() spew during probe()]
> Signed-off-by: Stephen Warren <swarren at nvidia.com>
>
> Changes for v2: Modified by Marek's comments.
>         - Remove pattern informations.
>         - Don't allocate & free when read/write register.
>         - relpace udelay to mdelay.
>         - pull firmware into global variable.
>         - code review.
>
> Signed-off-by: Ted Chen <tedchen at realtek.com>
> ---
>  drivers/usb/eth/Makefile    |    1 +
>  drivers/usb/eth/r8152.c     | 3099 +++++++++++++++++++++++++++++++++++++++++++
>  drivers/usb/eth/usb_ether.c |    8 +
>  include/usb_ether.h         |    6 +
>  4 files changed, 3114 insertions(+)
>  create mode 100644 drivers/usb/eth/r8152.c
>
> diff --git a/drivers/usb/eth/Makefile b/drivers/usb/eth/Makefile
> index c92d2b0..74f5f87 100644
> --- a/drivers/usb/eth/Makefile
> +++ b/drivers/usb/eth/Makefile
> @@ -9,3 +9,4 @@ obj-$(CONFIG_USB_ETHER_ASIX) += asix.o
>  obj-$(CONFIG_USB_ETHER_ASIX88179) += asix88179.o
>  obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o
>  obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
> +obj-$(CONFIG_USB_ETHER_RTL8152) += r8152.o
> diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
> new file mode 100644
> index 0000000..345f2c3
> --- /dev/null
> +++ b/drivers/usb/eth/r8152.c
> @@ -0,0 +1,3099 @@
> +/*
> + * Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved.
> + *
> + * SPDX-License-Identifier:    GPL-2.0
> + *
> +  */
> +
> +#include <common.h>
> +#include <errno.h>
> +#include <malloc.h>
> +#include <usb.h>
> +#include <usb/lin_gadget_compat.h>
> +#include <linux/mii.h>
> +#include <linux/bitops.h>
> +#include "usb_ether.h"
> +
> +#define DRIVER_VERSION "v1.0 (2015/11/24)"

If this is somehow useful to link back to a Realtek release or
something, then in belongs in the commit log, not in the code.

> +
> +#define R8152_PHY_ID           32
> +

8< snip >8

> +
> +/* The forced speed, 10Mb, 100Mb, gigabit, [2.5|5|10|20|25|40|50|56|100]GbE. */
> +#define SPEED_10                10
> +#define SPEED_100               100
> +#define SPEED_1000              1000
> +#define SPEED_2500              2500
> +#define SPEED_5000              5000
> +#define SPEED_10000             10000
> +#define SPEED_20000             20000
> +#define SPEED_25000             25000
> +#define SPEED_40000             40000
> +#define SPEED_50000             50000
> +#define SPEED_56000             56000
> +#define SPEED_100000            100000

Are all the speeds really relevant to define? They aren't used. Maybe
lose all the unused ones.

> +#define SPEED_UNKNOWN           -1
> +
> +/* Duplex, half or full. */
> +#define DUPLEX_HALF             0x00
> +#define DUPLEX_FULL             0x01
> +#define DUPLEX_UNKNOWN          0xff
> +
> +/* Enable or disable autonegotiation. */
> +#define AUTONEG_DISABLE         0x00
> +#define AUTONEG_ENABLE          0x01
> +
> +
> +/* Generic MII registers. */
> +#define MII_BMCR                0x00    /* Basic mode control register */
> +#define MII_BMSR                0x01    /* Basic mode status register  */
> +#define MII_PHYSID1             0x02    /* PHYS ID 1                   */
> +#define MII_PHYSID2             0x03    /* PHYS ID 2                   */
> +#define MII_ADVERTISE           0x04    /* Advertisement control reg   */
> +#define MII_LPA                 0x05    /* Link partner ability reg    */
> +#define MII_EXPANSION           0x06    /* Expansion register          */
> +#define MII_CTRL1000            0x09    /* 1000BASE-T control          */
> +#define MII_STAT1000            0x0a    /* 1000BASE-T status           */
> +#define MII_MMD_CTRL            0x0d    /* MMD Access Control Register */
> +#define MII_MMD_DATA            0x0e    /* MMD Access Data Register */
> +#define MII_ESTATUS             0x0f    /* Extended Status             */
> +#define MII_DCOUNTER            0x12    /* Disconnect counter          */
> +#define MII_FCSCOUNTER          0x13    /* False carrier counter       */
> +#define MII_NWAYTEST            0x14    /* N-way auto-neg test reg     */
> +#define MII_RERRCOUNTER         0x15    /* Receive error counter       */
> +#define MII_SREVISION           0x16    /* Silicon revision            */
> +#define MII_RESV1               0x17    /* Reserved...                 */
> +#define MII_LBRERROR            0x18    /* Lpback, rx, bypass error    */
> +#define MII_PHYADDR             0x19    /* PHY address                 */
> +#define MII_RESV2               0x1a    /* Reserved...                 */
> +#define MII_TPISTATUS           0x1b    /* TPI status for 10mbps       */
> +#define MII_NCONFIG             0x1c    /* Network interface config    */
> +
> +#define agg_buf_sz 2048
> +
> +/* local vars */
> +static int curr_eth_dev; /* index for name of next device detected */
> +
> +#define R8152_BASE_NAME "r8152"
> +
> +
> +struct r8152_dongle {
> +       unsigned short vendor;
> +       unsigned short product;
> +};

With all the extensive defines here, this file is pretty deep to get
to any actual implementation. Maybe it would be cleaner to split
everything above here into a drivers/usb/eth/r8152.h

> +static const struct r8152_dongle const r8152_dongles[] = {
> +       /* Realtek */
> +       { 0x0bda, 0x8050 },
> +       { 0x0bda, 0x8152 },
> +       { 0x0bda, 0x8153 },
> +
> +       /* Samsung */
> +       { 0x04e8, 0xa101 },
> +
> +       /* Lenovo */
> +       { 0x17ef, 0x304f },
> +       { 0x17ef, 0x3052 },
> +       { 0x17ef, 0x3054 },
> +       { 0x17ef, 0x3057 },
> +       { 0x17ef, 0x7205 },
> +       { 0x17ef, 0x720a },
> +       { 0x17ef, 0x720b },
> +       { 0x17ef, 0x720c },
> +
> +       /* TP-LINK */
> +       { 0x2357, 0x0601 },
> +
> +       /* Nvidia */
> +       { 0x0955, 0x09ff },
> +
> +       { 0x0000, 0x0000 }      /* END - Do not remove */
> +};
> +
> +#define msleep(a)      mdelay(a)

Just use mdelay() in the code.

> +static u8 r8152b_pla_patch_a[] = {
> +       0x08, 0xe0, 0x40, 0xe0, 0x78, 0xe0, 0x85, 0xe0,

8< snip >8

> +       0x00, 0x00, 0x02, 0xc1, 0x00, 0xb9, 0x00, 0x00 };
> +
> +static u16 r8153_usb_patch_d_bp[] = {
> +       0xfc26, 0xa000, 0xfc28, 0x0000, 0xfc2a, 0x0000, 0xfc2c, 0x1792,
> +       0xfc2e, 0x1236, 0xfc30, 0x0000, 0xfc32, 0x0000, 0xfc34, 0x0000,
> +       0xfc36, 0x0000, 0xfc38, 0x000c };

Something about this firmware is very ugly to me. Seems like it should
live in its own file that noone ever opens. Maybe noone else cares,
but that's my opinion.

> +
> +static
> +int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
> +{
> +       int ret;
> +
> +       ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
> +                             RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
> +                             value, index, data, size, 500);
> +       if (ret < 0)
> +               memset(data, 0xff, size);

That's peculiar. I guess you are emulating a bus pulled high?

> +       return ret;
> +}
> +
> +static
> +int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
> +{
> +       int ret;
> +
> +       ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
> +                             RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
> +                             value, index, data, size, 500);
> +
> +       return ret;
> +}
> +
> +static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
> +                           void *data, u16 type)
> +{
> +       u16 limit = 64;

I think a better name would be something like "burst_size".

> +       int ret = 0;
> +
> +       /* both size and indix must be 4 bytes align */

indix -> index

> +       if ((size & 3) || !size || (index & 3) || !data)
> +               return -EPERM;

I think -EINVAL is more appropriate here.

> +
> +       if ((u32)index + (u32)size > 0xffff)
> +               return -EPERM;

I think -EINVAL is more appropriate here.

> +
> +       while (size) {
> +               if (size > limit) {
> +                       ret = get_registers(tp, index, type, limit, data);
> +                       if (ret < 0)
> +                               break;
> +
> +                       index += limit;
> +                       data += limit;
> +                       size -= limit;
> +               } else {
> +                       ret = get_registers(tp, index, type, size, data);
> +                       if (ret < 0)
> +                               break;
> +
> +                       index += size;
> +                       data += size;
> +                       size = 0;
> +                       break;
> +               }
> +       }
> +
> +       return ret;
> +}
> +
> +static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
> +                            u16 size, void *data, u16 type)
> +{
> +       int ret;
> +       u16 byteen_start, byteen_end, byen;

What is a "byteen"? Is that supposed to be "byte_en"? How about
"byen"? how does it differ from the function parameter "byteen".
Please clean up the names used in here to make it clear.

> +       u16 limit = 512;
> +
> +       /* both size and indix must be 4 bytes align */

indix -> index

> +       if ((size & 3) || !size || (index & 3) || !data)
> +               return -EPERM;

I think -EINVAL is more appropriate here.

> +
> +       if ((u32)index + (u32)size > 0xffff)
> +               return -EPERM;

I think -EINVAL is more appropriate here.

> +
> +       byteen_start = byteen & BYTE_EN_START_MASK;
> +       byteen_end = byteen & BYTE_EN_END_MASK;
> +
> +       byen = byteen_start | (byteen_start << 4);
> +       ret = set_registers(tp, index, type | byen, 4, data);
> +       if (ret < 0)
> +               goto error1;

Why are you not just returning at each of these points? You do no cleanup.

> +
> +       index += 4;
> +       data += 4;
> +       size -= 4;
> +
> +       if (size) {
> +               size -= 4;
> +
> +               while (size) {
> +                       if (size > limit) {
> +                               ret = set_registers(tp, index,
> +                                                   type | BYTE_EN_DWORD,
> +                                                   limit, data);
> +                               if (ret < 0)
> +                                       goto error1;
> +
> +                               index += limit;
> +                               data += limit;
> +                               size -= limit;
> +                       } else {
> +                               ret = set_registers(tp, index,
> +                                                   type | BYTE_EN_DWORD,
> +                                                   size, data);
> +                               if (ret < 0)
> +                                       goto error1;
> +
> +                               index += size;
> +                               data += size;
> +                               size = 0;
> +                               break;
> +                       }
> +               }
> +
> +               byen = byteen_end | (byteen_end >> 4);
> +               ret = set_registers(tp, index, type | byen, 4, data);
> +               if (ret < 0)
> +                       goto error1;
> +       }
> +
> +error1:
> +
> +       return ret;
> +}
> +
> +static inline

You don't need to tell the compiler what to do here. It will ignore
you anyway. I recommend you drop the "inline" on these functions.

> +int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
> +{
> +       return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
> +}
> +
> +static inline
> +int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
> +{
> +       return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
> +}
> +
> +static inline
> +int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
> +{
> +       return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
> +}
> +
> +static inline
> +int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
> +{
> +       return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
> +}
> +
> +static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
> +{
> +       __le32 data;
> +
> +       generic_ocp_read(tp, index, sizeof(data), &data, type);
> +
> +       return __le32_to_cpu(data);
> +}
> +
> +static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
> +{
> +       __le32 tmp = __cpu_to_le32(data);
> +
> +       generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
> +}
> +
> +static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
> +{
> +       u32 data;
> +       __le32 tmp;
> +       u8 shift = index & 2;
> +
> +       index &= ~3;
> +
> +       generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
> +
> +       data = __le32_to_cpu(tmp);
> +       data >>= (shift * 8);
> +       data &= 0xffff;
> +
> +       return (u16)data;
> +}
> +
> +static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
> +{
> +       u32 mask = 0xffff;
> +       __le32 tmp;
> +       u16 byen = BYTE_EN_WORD;
> +       u8 shift = index & 2;
> +
> +       data &= mask;
> +
> +       if (index & 2) {
> +               byen <<= shift;
> +               mask <<= (shift * 8);
> +               data <<= (shift * 8);
> +               index &= ~3;
> +       }
> +
> +       tmp = __cpu_to_le32(data);
> +
> +       generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
> +}
> +
> +static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
> +{
> +       u32 data;
> +       __le32 tmp;
> +       u8 shift = index & 3;
> +
> +       index &= ~3;
> +
> +       generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
> +
> +       data = __le32_to_cpu(tmp);
> +       data >>= (shift * 8);
> +       data &= 0xff;
> +
> +       return (u8)data;
> +}
> +
> +static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
> +{
> +       u32 mask = 0xff;
> +       __le32 tmp;
> +       u16 byen = BYTE_EN_BYTE;
> +       u8 shift = index & 3;
> +
> +       data &= mask;
> +
> +       if (index & 3) {
> +               byen <<= shift;
> +               mask <<= (shift * 8);
> +               data <<= (shift * 8);
> +               index &= ~3;
> +       }
> +
> +       tmp = __cpu_to_le32(data);
> +
> +       generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
> +}
> +
> +static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
> +{
> +       u16 ocp_base, ocp_index;
> +
> +       ocp_base = addr & 0xf000;
> +       if (ocp_base != tp->ocp_base) {
> +               ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
> +               tp->ocp_base = ocp_base;
> +       }
> +
> +       ocp_index = (addr & 0x0fff) | 0xb000;
> +       return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
> +}
> +
> +static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
> +{
> +       u16 ocp_base, ocp_index;
> +
> +       ocp_base = addr & 0xf000;
> +       if (ocp_base != tp->ocp_base) {
> +               ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
> +               tp->ocp_base = ocp_base;
> +       }
> +
> +       ocp_index = (addr & 0x0fff) | 0xb000;
> +       ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
> +}
> +
> +static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
> +{
> +       ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
> +}
> +
> +static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
> +{
> +       return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
> +}
> +
> +static void sram_write(struct r8152 *tp, u16 addr, u16 data)
> +{
> +       ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
> +       ocp_reg_write(tp, OCP_SRAM_DATA, data);
> +}
> +
> +static void r8152b_reset_packet_filter(struct r8152 *tp)
> +{
> +       u32     ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
> +       ocp_data &= ~FMC_FCR_MCU_EN;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
> +       ocp_data |= FMC_FCR_MCU_EN;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
> +}
> +
> +static void rtl8152_nic_reset(struct r8152 *tp)
> +{
> +       int     i;
> +
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
> +
> +       for (i = 0; i < 1000; i++) {
> +               if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
> +                       break;
> +
> +               udelay(400);
> +       }
> +}
> +
> +static inline u8 rtl8152_get_speed(struct r8152 *tp)
> +{
> +       return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
> +}
> +
> +static void rtl_set_eee_plus(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
> +       ocp_data &= ~EEEP_CR_EEEP_TX;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
> +}
> +
> +static void rxdy_gated_en(struct r8152 *tp, bool enable)
> +{
> +       u32 ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
> +       if (enable)
> +               ocp_data |= RXDY_GATED_EN;
> +       else
> +               ocp_data &= ~RXDY_GATED_EN;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
> +}
> +
> +static void rtl8152_set_rx_mode(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       __le32 tmp[2];
> +
> +       tmp[0] = 0xffffffff;
> +       tmp[1] = 0xffffffff;
> +
> +       pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
> +
> +       ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
> +       ocp_data |= RCR_APM | RCR_AM | RCR_AB;
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
> +}
> +
> +
> +

Why extra white space? Please remove.

> +static int rtl_enable(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +
> +       r8152b_reset_packet_filter(tp);
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
> +       ocp_data |= CR_RE | CR_TE;
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
> +
> +       rxdy_gated_en(tp, false);
> +
> +       rtl8152_set_rx_mode(tp);
> +
> +       return 0;
> +}
> +
> +static int rtl8152_enable(struct r8152 *tp)
> +{
> +       rtl_set_eee_plus(tp);
> +
> +       return rtl_enable(tp);
> +}
> +
> +static void r8153_set_rx_early_timeout(struct r8152 *tp)
> +{
> +       u32 ocp_data = tp->coalesce / 8;
> +
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
> +}
> +
> +static void r8153_set_rx_early_size(struct r8152 *tp)
> +{
> +       u32 ocp_data = (agg_buf_sz - RTL8153_RMS) / 4;

Add blank line. Checkpatch.pl?

> +       ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
> +}
> +
> +static int rtl8153_enable(struct r8152 *tp)
> +{
> +       rtl_set_eee_plus(tp);
> +       r8153_set_rx_early_timeout(tp);
> +       r8153_set_rx_early_size(tp);
> +
> +       return rtl_enable(tp);
> +}
> +
> +static void rtl_disable(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       int i;
> +
> +       ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
> +       ocp_data &= ~RCR_ACPT_ALL;
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
> +
> +       rxdy_gated_en(tp, true);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
> +                       break;
> +
> +               mdelay(2);
> +       }
> +
> +       for (i = 0; i < 1000; i++) {
> +               if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       rtl8152_nic_reset(tp);
> +}
> +
> +static void r8152_power_cut_en(struct r8152 *tp, bool enable)
> +{
> +       u32 ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
> +       if (enable)
> +               ocp_data |= POWER_CUT;
> +       else
> +               ocp_data &= ~POWER_CUT;
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
> +       ocp_data &= ~RESUME_INDICATE;
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
> +}
> +
> +static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
> +{
> +       u32 ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
> +       if (enable)
> +               ocp_data |= CPCR_RX_VLAN;
> +       else
> +               ocp_data &= ~CPCR_RX_VLAN;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
> +}
> +
> +static void r8153_u1u2en(struct r8152 *tp, bool enable)
> +{
> +       u8 u1u2[8];
> +
> +       if (enable)
> +               memset(u1u2, 0xff, sizeof(u1u2));
> +       else
> +               memset(u1u2, 0x00, sizeof(u1u2));
> +
> +       usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
> +}
> +
> +static void r8153_u2p3en(struct r8152 *tp, bool enable)
> +{
> +       u32 ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
> +       if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
> +               ocp_data |= U2P3_ENABLE;
> +       else
> +               ocp_data &= ~U2P3_ENABLE;
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
> +}
> +
> +static void r8153_power_cut_en(struct r8152 *tp, bool enable)
> +{
> +       u32 ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
> +       if (enable)
> +               ocp_data |= PWR_EN | PHASE2_EN;
> +       else
> +               ocp_data &= ~(PWR_EN | PHASE2_EN);
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
> +       ocp_data &= ~PCUT_STATUS;
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
> +}
> +
> +static void rtl_clear_bp(struct r8152 *tp)
> +{
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
> +       ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
> +       ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
> +       ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
> +       ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
> +
> +       mdelay(6);
> +
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
> +}
> +
> +static void r8153_clear_bp(struct r8152 *tp)
> +{
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0);
> +       ocp_write_byte(tp, MCU_TYPE_USB, USB_BP_EN, 0);
> +       rtl_clear_bp(tp);
> +}
> +
> +static void patch4(struct r8152 *tp)
> +{
> +       u8 data;
> +
> +       data = ocp_read_byte(tp, MCU_TYPE_USB, 0xd429);
> +       data |= 0x80;
> +       ocp_write_byte(tp, MCU_TYPE_USB, 0xd429, data);
> +       ocp_write_word(tp, MCU_TYPE_USB, 0xc0ce, 0x0210);
> +       data = ocp_read_byte(tp, MCU_TYPE_USB, 0xd429);
> +       data &= ~0x80;
> +       ocp_write_byte(tp, MCU_TYPE_USB, 0xd429, data);
> +}
> +
> +static void r8152b_firmware(struct r8152 *tp)

It would be great if you collect all the firmware manipulation
functions into one part of the file so that they are all close
together.

> +{
> +       int i;
> +
> +       if (tp->version == RTL_VER_01) {
> +               int i;
> +
> +               patch4(tp);
> +               rtl_clear_bp(tp);
> +
> +               generic_ocp_write(tp, 0xf800, 0x3f,
> +                                 sizeof(r8152b_pla_patch_a),
> +                                 r8152b_pla_patch_a, MCU_TYPE_PLA);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8152b_pla_patch_a_bp); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_PLA,
> +                                      r8152b_pla_patch_a_bp[i],
> +                                      r8152b_pla_patch_a_bp[i+1]);
> +
> +               ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
> +               ocp_write_word(tp, MCU_TYPE_PLA, 0xb092, 0x7070);
> +               ocp_write_word(tp, MCU_TYPE_PLA, 0xb098, 0x0600);
> +               for (i = 0; i < ARRAY_SIZE(r8152b_ram_code1); i++)
> +                       ocp_write_word(tp, MCU_TYPE_PLA, 0xb09a,
> +                                      r8152b_ram_code1[i]);
> +
> +               ocp_write_word(tp, MCU_TYPE_PLA, 0xb098, 0x0200);
> +               ocp_write_word(tp, MCU_TYPE_PLA, 0xb092, 0x7030);
> +       } else if (tp->version == RTL_VER_02) {
> +               rtl_clear_bp(tp);
> +
> +               generic_ocp_write(tp, 0xf800, 0xff,
> +                                 sizeof(r8152b_pla_patch_a2),
> +                                 r8152b_pla_patch_a2, MCU_TYPE_PLA);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8152b_pla_patch_a2_bp);
> +                    i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_PLA,
> +                                      r8152b_pla_patch_a2_bp[i],
> +                                      r8152b_pla_patch_a2_bp[i+1]);
> +       }
> +}
> +
> +static int r8152_read_mac(struct eth_device *eth)

If you don't plan to add this initially with driver model support
(that would be best), you should at least write it in a way that is
easy to convert. That means instead of passing in the struct
eth_device, just pass a pointer to the MAC and your priv data, so that
either model can easily call.

> +{
> +       struct ueth_data *dev = (struct ueth_data *)eth->priv;
> +       struct r8152 *tp = (struct r8152 *)dev->dev_priv;
> +
> +       unsigned char enetaddr[8] = {0};
> +
> +       if (pla_ocp_read(tp, PLA_IDR, 8, enetaddr) < 0)
> +               return -1;

Just return the error code from the read?

> +
> +       memcpy(eth->enetaddr, enetaddr, ETH_ALEN);
> +       return 0;
> +}
> +
> +static void r8152b_disable_aldps(struct r8152 *tp)
> +{
> +       ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
> +       msleep(20);
> +}
> +
> +static inline void r8152b_enable_aldps(struct r8152 *tp)
> +{
> +       ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
> +               LINKENA | DIS_SDSAVE);
> +}
> +
> +static void rtl8152_disable(struct r8152 *tp)
> +{
> +       r8152b_disable_aldps(tp);
> +       rtl_disable(tp);
> +       r8152b_enable_aldps(tp);
> +}
> +
> +static void r8152b_hw_phy_cfg(struct r8152 *tp)
> +{
> +       u16 data;
> +
> +       data = r8152_mdio_read(tp, MII_BMCR);
> +       if (data & BMCR_PDOWN) {
> +               data &= ~BMCR_PDOWN;
> +               r8152_mdio_write(tp, MII_BMCR, data);
> +       }
> +
> +       r8152b_firmware(tp);
> +}
> +
> +static void r8152b_exit_oob(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       int i;
> +
> +       ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
> +       ocp_data &= ~RCR_ACPT_ALL;
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
> +
> +       rxdy_gated_en(tp, true);
> +       r8152b_hw_phy_cfg(tp);
> +
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +       ocp_data &= ~NOW_IS_OOB;
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
> +       ocp_data &= ~MCU_BORW_EN;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +
> +               mdelay(2);
> +       }
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
> +       ocp_data |= RE_INIT_LL;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       rtl8152_nic_reset(tp);
> +
> +       /* rx share fifo credit full threshold */
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
> +
> +       if (tp->udev->speed == USB_SPEED_FULL ||
> +           tp->udev->speed == USB_SPEED_LOW) {
> +               /* rx share fifo credit near full threshold */
> +               ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
> +                               RXFIFO_THR2_FULL);
> +               ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
> +                               RXFIFO_THR3_FULL);
> +       } else {
> +               /* rx share fifo credit near full threshold */
> +               ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
> +                               RXFIFO_THR2_HIGH);
> +               ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
> +                               RXFIFO_THR3_HIGH);
> +       }
> +
> +       /* TX share fifo free credit full threshold */
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
> +
> +       ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
> +       ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
> +       ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
> +                       TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
> +
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
> +       ocp_data |= TCR0_AUTO_FIFO;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
> +}
> +
> +static void r8152b_enter_oob(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       int i;
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +       ocp_data &= ~NOW_IS_OOB;
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
> +
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
> +
> +       rtl_disable(tp);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
> +       ocp_data |= RE_INIT_LL;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
> +
> +       rtl_rx_vlan_en(tp, false);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
> +       ocp_data |= ALDPS_PROXY_MODE;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +       ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
> +
> +       rxdy_gated_en(tp, false);
> +
> +       ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
> +       ocp_data |= RCR_APM | RCR_AM | RCR_AB;
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
> +}
> +
> +static int r8153_pre_ram_code(struct r8152 *tp, u16 patch_key)
> +{
> +       u16 data;
> +       int i;
> +
> +       data = ocp_reg_read(tp, 0xb820);
> +       data |= 0x0010;
> +       ocp_reg_write(tp, 0xb820, data);
> +
> +       for (i = 0, data = 0; !data && i < 5000; i++) {
> +               mdelay(2);
> +               data = ocp_reg_read(tp, 0xb800) & 0x0040;
> +       }
> +
> +       sram_write(tp, 0x8146, patch_key);
> +       sram_write(tp, 0xb82e, 0x0001);
> +
> +       return -EBUSY;
> +}
> +
> +static int r8153_post_ram_code(struct r8152 *tp)
> +{
> +       u16 data;
> +
> +       sram_write(tp, 0x0000, 0x0000);
> +
> +       data = ocp_reg_read(tp, 0xb82e);
> +       data &= ~0x0001;
> +       ocp_reg_write(tp, 0xb82e, data);
> +
> +       sram_write(tp, 0x8146, 0x0000);
> +
> +       data = ocp_reg_read(tp, 0xb820);
> +       data &= ~0x0010;
> +       ocp_reg_write(tp, 0xb820, data);
> +
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, tp->ocp_base);
> +
> +       return 0;
> +}
> +
> +static void r8153_wdt1_end(struct r8152 *tp)
> +{
> +       int i;
> +
> +       for (i = 0; i < 104; i++) {
> +               if (!(ocp_read_byte(tp, MCU_TYPE_USB, 0xe404) & 1))
> +                       break;
> +               mdelay(2);
> +       }
> +}
> +
> +static void r8153_firmware(struct r8152 *tp)
> +{
> +       int i;
> +
> +       if (tp->version == RTL_VER_03) {
> +               r8153_clear_bp(tp);
> +
> +               r8153_pre_ram_code(tp, 0x7000);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_ram_code_a); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_PLA,
> +                                      r8153_ram_code_a[i],
> +                                      r8153_ram_code_a[i+1]);
> +
> +               r8153_post_ram_code(tp);
> +       } else if (tp->version == RTL_VER_04) {
> +               r8153_pre_ram_code(tp, 0x7001);
> +
> +       for (i = 0; i < ARRAY_SIZE(r8153_ram_code_bc); i = i+2)

Bad indentation.

> +               ocp_write_word(tp, MCU_TYPE_PLA,
> +                              r8153_ram_code_bc[i],
> +                              r8153_ram_code_bc[i+1]);
> +
> +               r8153_post_ram_code(tp);
> +
> +               r8153_wdt1_end(tp);
> +               r8153_clear_bp(tp);
> +
> +               ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
> +               generic_ocp_write(tp, 0xf800, 0xff,
> +                                 sizeof(r8153_usb_patch_b),
> +                                 r8153_usb_patch_b, MCU_TYPE_USB);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_usb_patch_b_bp); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_USB,
> +                                      r8153_usb_patch_b_bp[i],
> +                                      r8153_usb_patch_b_bp[i+1]);
> +
> +               if (!(ocp_read_word(tp, MCU_TYPE_PLA, 0xd38e) & BIT(0))) {
> +                       ocp_write_word(tp, MCU_TYPE_PLA, 0xd38c, 0x0082);
> +                       ocp_write_word(tp, MCU_TYPE_PLA, 0xd38e, 0x0082);
> +               }
> +
> +               ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000);
> +               generic_ocp_write(tp, 0xf800, 0xff,
> +                                 sizeof(r8153_pla_patch_b),
> +                                 r8153_pla_patch_b, MCU_TYPE_PLA);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_pla_patch_b_bp); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_PLA,
> +                                      r8153_pla_patch_b_bp[i],
> +                                      r8153_pla_patch_b_bp[i+1]);
> +
> +               ocp_write_word(tp, MCU_TYPE_PLA, 0xd388, 0x08ca);
> +       } else if (tp->version == RTL_VER_05) {
> +               u32 ocp_data;
> +
> +               ocp_data = ocp_read_word(tp, MCU_TYPE_USB, 0xcfca);
> +               ocp_data &= ~0x4000;
> +               ocp_write_word(tp, MCU_TYPE_USB, 0xcfca, ocp_data);
> +
> +               r8153_pre_ram_code(tp, 0x7001);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_ram_code_bc); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_PLA,
> +                                      r8153_ram_code_bc[i],
> +                                      r8153_ram_code_bc[i+1]);
> +
> +               r8153_post_ram_code(tp);
> +
> +               r8153_wdt1_end(tp);
> +               r8153_clear_bp(tp);
> +
> +               ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
> +               generic_ocp_write(tp, 0xf800, 0xff,
> +                                 sizeof(r8153_usb_patch_c),
> +                                 r8153_usb_patch_c, MCU_TYPE_USB);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_usb_patch_c_bp); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_USB,
> +                                      r8153_usb_patch_c_bp[i],
> +                                      r8153_usb_patch_c_bp[i+1]);
> +
> +               if (ocp_read_byte(tp, MCU_TYPE_USB, 0xcfef) & 1) {
> +                       ocp_write_word(tp, MCU_TYPE_USB, 0xfc30, 0x1578);
> +                       ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x00ff);
> +               } else {
> +                       ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x00ef);
> +               }
> +
> +               ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000);
> +               generic_ocp_write(tp, 0xf800, 0xff,
> +                                 sizeof(r8153_pla_patch_c),
> +                                 r8153_pla_patch_c, MCU_TYPE_PLA);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_pla_patch_c_bp); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_PLA,
> +                                      r8153_pla_patch_c_bp[i],
> +                                      r8153_pla_patch_c_bp[i+1]);
> +
> +               ocp_write_word(tp, MCU_TYPE_PLA, 0xd388, 0x08ca);
> +
> +               ocp_data = ocp_read_word(tp, MCU_TYPE_USB, 0xcfca);
> +               ocp_data |= 0x4000;
> +               ocp_write_word(tp, MCU_TYPE_USB, 0xcfca, ocp_data);
> +       } else if (tp->version == RTL_VER_06) {
> +               r8153_pre_ram_code(tp, 0x7002);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_ram_code_d); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_PLA,
> +                                      r8153_ram_code_d[i],
> +                                      r8153_ram_code_d[i+1]);
> +
> +               r8153_post_ram_code(tp);
> +
> +               r8153_clear_bp(tp);
> +
> +               ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
> +               generic_ocp_write(tp, 0xf800, 0xff, sizeof(usb_patch_d),
> +                                 usb_patch_d, MCU_TYPE_USB);
> +
> +               for (i = 0; i < ARRAY_SIZE(r8153_usb_patch_d_bp); i = i+2)
> +                       ocp_write_word(tp, MCU_TYPE_USB,
> +                                      r8153_usb_patch_d_bp[i],
> +                                      r8153_usb_patch_d_bp[i+1]);
> +       }
> +}
> +
> +static void r8153_hw_phy_cfg(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       u16 data;
> +
> +       if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
> +           tp->version == RTL_VER_05)
> +               ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
> +
> +       data = r8152_mdio_read(tp, MII_BMCR);
> +       if (data & BMCR_PDOWN) {
> +               data &= ~BMCR_PDOWN;
> +               r8152_mdio_write(tp, MII_BMCR, data);
> +       }
> +
> +       r8153_firmware(tp);
> +
> +       if (tp->version == RTL_VER_03) {
> +               data = ocp_reg_read(tp, OCP_EEE_CFG);
> +               data &= ~CTAP_SHORT_EN;
> +               ocp_reg_write(tp, OCP_EEE_CFG, data);
> +       }
> +
> +       data = ocp_reg_read(tp, OCP_POWER_CFG);
> +       data |= EEE_CLKDIV_EN;
> +       ocp_reg_write(tp, OCP_POWER_CFG, data);
> +
> +       data = ocp_reg_read(tp, OCP_DOWN_SPEED);
> +       data |= EN_10M_BGOFF;
> +       ocp_reg_write(tp, OCP_DOWN_SPEED, data);
> +       data = ocp_reg_read(tp, OCP_POWER_CFG);
> +       data |= EN_10M_PLLOFF;
> +       ocp_reg_write(tp, OCP_POWER_CFG, data);
> +       sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
> +       ocp_data |= PFM_PWM_SWITCH;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
> +
> +       /* Enable LPF corner auto tune */
> +       sram_write(tp, SRAM_LPF_CFG, 0xf70f);
> +
> +       /* Adjust 10M Amplitude */
> +       sram_write(tp, SRAM_10M_AMP1, 0x00af);
> +       sram_write(tp, SRAM_10M_AMP2, 0x0208);
> +}
> +
> +static void r8153_first_init(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       int i;
> +
> +       rxdy_gated_en(tp, true);
> +
> +       ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
> +       ocp_data &= ~RCR_ACPT_ALL;
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
> +
> +       r8153_hw_phy_cfg(tp);
> +
> +       rtl8152_nic_reset(tp);
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +       ocp_data &= ~NOW_IS_OOB;
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
> +       ocp_data &= ~MCU_BORW_EN;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
> +       ocp_data |= RE_INIT_LL;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       rtl_rx_vlan_en(tp, false);
> +
> +       ocp_data = RTL8153_RMS;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
> +       ocp_data |= TCR0_AUTO_FIFO;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
> +
> +       rtl8152_nic_reset(tp);
> +
> +       /* rx share fifo credit full threshold */
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
> +       /* TX share fifo free credit full threshold */
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
> +
> +       /* rx aggregation */
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
> +
> +       ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
> +}
> +
> +static void r8153_enter_oob(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       int i;
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +       ocp_data &= ~NOW_IS_OOB;
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
> +
> +       rtl_disable(tp);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
> +       ocp_data |= RE_INIT_LL;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
> +
> +       for (i = 0; i < 1000; i++) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +               if (ocp_data & LINK_LIST_READY)
> +                       break;
> +               mdelay(2);
> +       }
> +
> +       ocp_data = RTL8153_RMS;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
> +       ocp_data &= ~TEREDO_WAKE_MASK;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
> +
> +       rtl_rx_vlan_en(tp, false);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
> +       ocp_data |= ALDPS_PROXY_MODE;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
> +       ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
> +
> +       rxdy_gated_en(tp, false);
> +
> +       ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
> +       ocp_data |= RCR_APM | RCR_AM | RCR_AB;
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
> +}
> +
> +static void r8153_disable_aldps(struct r8152 *tp)
> +{
> +       u16 data;
> +
> +       data = ocp_reg_read(tp, OCP_POWER_CFG);
> +       data &= ~EN_ALDPS;
> +       ocp_reg_write(tp, OCP_POWER_CFG, data);
> +       msleep(20);
> +}
> +
> +
> +static void rtl8153_disable(struct r8152 *tp)
> +{
> +       r8153_disable_aldps(tp);
> +       rtl_disable(tp);
> +}
> +
> +static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
> +{
> +       u16 bmcr, anar, gbcr;
> +       int ret = 0;
> +
> +       anar = r8152_mdio_read(tp, MII_ADVERTISE);
> +       anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
> +                 ADVERTISE_100HALF | ADVERTISE_100FULL);
> +       if (tp->supports_gmii) {
> +               gbcr = r8152_mdio_read(tp, MII_CTRL1000);
> +               gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
> +       } else {
> +               gbcr = 0;
> +       }
> +
> +       if (autoneg == AUTONEG_DISABLE) {
> +               if (speed == SPEED_10) {
> +                       bmcr = 0;
> +                       anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
> +               } else if (speed == SPEED_100) {
> +                       bmcr = BMCR_SPEED100;
> +                       anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
> +               } else if (speed == SPEED_1000 && tp->supports_gmii) {
> +                       bmcr = BMCR_SPEED1000;
> +                       gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
> +               } else {
> +                       ret = -EINVAL;

Why not just return this value from here and others in this file. You
do no cleanup.

> +                       goto out;
> +               }
> +
> +               if (duplex == DUPLEX_FULL)
> +                       bmcr |= BMCR_FULLDPLX;
> +       } else {
> +               if (speed == SPEED_10) {
> +                       if (duplex == DUPLEX_FULL)
> +                               anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
> +                       else
> +                               anar |= ADVERTISE_10HALF;
> +               } else if (speed == SPEED_100) {
> +                       if (duplex == DUPLEX_FULL) {
> +                               anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
> +                               anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
> +                       } else {
> +                               anar |= ADVERTISE_10HALF;
> +                               anar |= ADVERTISE_100HALF;
> +                       }
> +               } else if (speed == SPEED_1000 && tp->supports_gmii) {
> +                       if (duplex == DUPLEX_FULL) {
> +                               anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
> +                               anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
> +                               gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
> +                       } else {
> +                               anar |= ADVERTISE_10HALF;
> +                               anar |= ADVERTISE_100HALF;
> +                               gbcr |= ADVERTISE_1000HALF;
> +                       }
> +               } else {
> +                       ret = -EINVAL;
> +                       goto out;
> +               }
> +
> +               bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
> +       }
> +
> +       if (tp->supports_gmii)
> +               r8152_mdio_write(tp, MII_CTRL1000, gbcr);
> +
> +       r8152_mdio_write(tp, MII_ADVERTISE, anar);
> +       r8152_mdio_write(tp, MII_BMCR, bmcr);
> +out:
> +
> +       return ret;
> +}
> +
> +static void rtl8152_up(struct r8152 *tp)
> +{
> +       r8152b_disable_aldps(tp);
> +       r8152b_exit_oob(tp);
> +       r8152b_enable_aldps(tp);
> +}
> +
> +static void rtl8152_down(struct r8152 *tp)
> +{
> +       r8152_power_cut_en(tp, false);
> +       r8152b_disable_aldps(tp);
> +       r8152b_enter_oob(tp);
> +       r8152b_enable_aldps(tp);
> +}
> +
> +static void rtl8153_up(struct r8152 *tp)
> +{
> +       r8153_u1u2en(tp, false);
> +       r8153_disable_aldps(tp);
> +       r8153_first_init(tp);
> +       r8153_u2p3en(tp, false);
> +}
> +
> +static void rtl8153_down(struct r8152 *tp)
> +{
> +       r8153_u1u2en(tp, false);
> +       r8153_u2p3en(tp, false);
> +       r8153_power_cut_en(tp, false);
> +       r8153_disable_aldps(tp);
> +       r8153_enter_oob(tp);
> +}
> +
> +static void r8152b_get_version(struct r8152 *tp)
> +{
> +       u32     ocp_data;
> +       u16     version;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
> +       version = (u16)(ocp_data & VERSION_MASK);
> +
> +       switch (version) {
> +       case 0x4c00:
> +               tp->version = RTL_VER_01;
> +               break;
> +       case 0x4c10:
> +               tp->version = RTL_VER_02;
> +               break;
> +       case 0x5c00:
> +               tp->version = RTL_VER_03;
> +               tp->supports_gmii = 1;
> +               break;
> +       case 0x5c10:
> +               tp->version = RTL_VER_04;
> +               tp->supports_gmii = 1;
> +               break;
> +       case 0x5c20:
> +               tp->version = RTL_VER_05;
> +               tp->supports_gmii = 1;
> +               break;
> +       case 0x5c30:
> +               tp->version = RTL_VER_06;
> +               tp->supports_gmii = 1;
> +               break;
> +       case 0x4800:
> +               tp->version = RTL_VER_07;
> +               break;
> +       default:
> +               printf("Unknown version 0x%04x\n", version);
> +               break;
> +       }
> +}
> +
> +static void r8152b_enable_fc(struct r8152 *tp)
> +{
> +       u16 anar;
> +       anar = r8152_mdio_read(tp, MII_ADVERTISE);
> +       anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
> +       r8152_mdio_write(tp, MII_ADVERTISE, anar);
> +}
> +
> +static void rtl_tally_reset(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
> +       ocp_data |= TALLY_RESET;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
> +}
> +
> +static void r8152b_init(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +
> +       r8152b_disable_aldps(tp);
> +
> +       if (tp->version == RTL_VER_01) {
> +               ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
> +               ocp_data &= ~LED_MODE_MASK;
> +               ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
> +       }
> +
> +       r8152_power_cut_en(tp, false);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
> +       ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
> +       ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
> +       ocp_data &= ~MCU_CLK_RATIO_MASK;
> +       ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
> +       ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
> +       ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
> +                  SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_TIMER);
> +       ocp_data |= BIT(15);
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_USB_TIMER, ocp_data);
> +       ocp_write_word(tp, MCU_TYPE_USB, 0xcbfc, 0x03e8);
> +       ocp_data &= ~BIT(15);
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_USB_TIMER, ocp_data);
> +
> +       r8152b_enable_fc(tp);
> +       rtl_tally_reset(tp);
> +
> +       /* enable rx aggregation */
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
> +
> +       ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
> +}
> +
> +static void r8153_init(struct r8152 *tp)
> +{
> +       u32 ocp_data;
> +       int i;
> +
> +       r8153_disable_aldps(tp);
> +       r8153_u1u2en(tp, false);
> +
> +       for (i = 0; i < 500; i++) {
> +               if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
> +                   AUTOLOAD_DONE)
> +                       break;
> +               msleep(20);
> +       }
> +
> +       for (i = 0; i < 500; i++) {
> +               ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
> +               if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
> +                       break;
> +               msleep(20);
> +       }
> +
> +       r8153_u2p3en(tp, false);
> +
> +       if (tp->version == RTL_VER_04) {
> +               ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
> +               ocp_data &= ~pwd_dn_scale_mask;
> +               ocp_data |= pwd_dn_scale(96);
> +               ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
> +
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
> +               ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
> +               ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
> +       } else if (tp->version == RTL_VER_05) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
> +               ocp_data &= ~ECM_ALDPS;
> +               ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
> +
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
> +               if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
> +                       ocp_data &= ~DYNAMIC_BURST;
> +               else
> +                       ocp_data |= DYNAMIC_BURST;
> +               ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
> +       } else if (tp->version == RTL_VER_06) {
> +               ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
> +               if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
> +                       ocp_data &= ~DYNAMIC_BURST;
> +               else
> +                       ocp_data |= DYNAMIC_BURST;
> +               ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
> +       }
> +
> +       ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
> +       ocp_data |= EP4_FULL_FC;
> +       ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
> +       ocp_data &= ~TIMER11_EN;
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
> +       ocp_data &= ~LED_MODE_MASK;
> +       ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
> +
> +       ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
> +       if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
> +               ocp_data |= LPM_TIMER_500MS;
> +       else
> +               ocp_data |= LPM_TIMER_500US;
> +       ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
> +
> +       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
> +       ocp_data &= ~SEN_VAL_MASK;
> +       ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
> +
> +       ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
> +
> +       r8153_power_cut_en(tp, false);
> +
> +       r8152b_enable_fc(tp);
> +       rtl_tally_reset(tp);
> +}
> +
> +static void rtl8152_unload(struct r8152 *tp)
> +{
> +       if (tp->version != RTL_VER_01)
> +               r8152_power_cut_en(tp, true);
> +}
> +
> +static void rtl8153_unload(struct r8152 *tp)
> +{
> +       r8153_power_cut_en(tp, false);
> +}
> +
> +static int rtl_ops_init(struct r8152 *tp)
> +{
> +       struct rtl_ops *ops = &tp->rtl_ops;
> +       int ret = 0;
> +
> +       switch (tp->version) {
> +       case RTL_VER_01:
> +       case RTL_VER_02:
> +       case RTL_VER_07:
> +               ops->init               = r8152b_init;
> +               ops->enable             = rtl8152_enable;
> +               ops->disable            = rtl8152_disable;
> +               ops->up                 = rtl8152_up;
> +               ops->down               = rtl8152_down;
> +               ops->unload             = rtl8152_unload;
> +               break;
> +
> +       case RTL_VER_03:
> +       case RTL_VER_04:
> +       case RTL_VER_05:
> +       case RTL_VER_06:
> +               ops->init               = r8153_init;
> +               ops->enable             = rtl8153_enable;
> +               ops->disable            = rtl8153_disable;
> +               ops->up                 = rtl8153_up;
> +               ops->down               = rtl8153_down;
> +               ops->unload             = rtl8153_unload;
> +               break;
> +
> +       default:
> +               ret = -ENODEV;
> +               printf("Unknown Device\n");
> +               break;
> +       }
> +
> +       return ret;
> +}
> +
> +static int r8152_init(struct eth_device *eth, bd_t *bd)
> +{
> +       struct ueth_data        *dev = (struct ueth_data *)eth->priv;
> +       struct r8152 *tp = (struct r8152 *)dev->dev_priv;
> +
> +       u8 speed;
> +       int timeout = 0;
> +#define TIMEOUT_RESOLUTION 50  /* ms */
> +#define PHY_CONNECT_TIMEOUT 5000
> +       int link_detected;
> +
> +       debug("** %s()\n", __func__);
> +
> +       do {
> +               speed = rtl8152_get_speed(tp);
> +
> +               link_detected = speed & LINK_STATUS;
> +               if (!link_detected) {
> +                       if (timeout == 0)
> +                               printf("Waiting for Ethernet connection... ");
> +                       mdelay(TIMEOUT_RESOLUTION);
> +                       timeout += TIMEOUT_RESOLUTION;
> +               }
> +       } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
> +       if (link_detected) {
> +               tp->rtl_ops.enable(tp);
> +
> +               if (timeout != 0)
> +                       printf("done.\n");
> +       } else {
> +               printf("unable to connect.\n");
> +       }
> +
> +       return 0;
> +}
> +
> +static int r8152_send(struct eth_device *eth, void *packet, int length)
> +{
> +       struct ueth_data *dev = (struct ueth_data *)eth->priv;
> +
> +       u32 opts1, opts2 = 0;
> +
> +       int err;
> +
> +       int actual_len;
> +       unsigned char msg[PKTSIZE + sizeof(struct tx_desc)];
> +       struct tx_desc *tx_desc = (struct tx_desc *)msg;
> +
> +#define USB_BULK_SEND_TIMEOUT 5000
> +
> +       debug("** %s(), len %d\n", __func__, length);
> +
> +       opts1 = length | TX_FS | TX_LS;
> +
> +       tx_desc->opts2 = cpu_to_le32(opts2);
> +       tx_desc->opts1 = cpu_to_le32(opts1);
> +
> +       memcpy(msg + sizeof(struct tx_desc), (void *)packet, length);
> +
> +       err = usb_bulk_msg(dev->pusb_dev,
> +                               usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
> +                               (void *)msg,
> +                               length + sizeof(struct tx_desc),
> +                               &actual_len,
> +                               USB_BULK_SEND_TIMEOUT);
> +       debug("Tx: len = %lu, actual = %u, err = %d\n",
> +             length + sizeof(struct tx_desc), actual_len, err);
> +
> +       return err;
> +}
> +
> +static int r8152_recv(struct eth_device *eth)
> +{
> +       struct ueth_data *dev = (struct ueth_data *)eth->priv;
> +
> +       static unsigned char  recv_buf[agg_buf_sz];
> +       unsigned char *pkt_ptr;
> +       int err;
> +       int actual_len;
> +       u16 packet_len;
> +
> +       u32 bytes_process = 0;
> +
> +       struct rx_desc *rx_desc;
> +
> +#define USB_BULK_RECV_TIMEOUT 5000
> +
> +       debug("** %s()\n", __func__);
> +
> +       err = usb_bulk_msg(dev->pusb_dev,
> +                               usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
> +                               (void *)recv_buf,
> +                               agg_buf_sz,
> +                               &actual_len,
> +                               USB_BULK_RECV_TIMEOUT);
> +       debug("Rx: len = %u, actual = %u, err = %d\n", agg_buf_sz,
> +             actual_len, err);
> +       if (err != 0) {
> +               debug("Rx: failed to receive\n");
> +               return -1;
> +       }
> +       if (actual_len > agg_buf_sz) {
> +               debug("Rx: received too many bytes %d\n", actual_len);
> +               return -1;
> +       }
> +
> +       while (bytes_process < actual_len) {
> +               rx_desc = (struct rx_desc *)(recv_buf + bytes_process);
> +               pkt_ptr = recv_buf + sizeof(struct rx_desc) + bytes_process;
> +
> +               packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
> +               packet_len -= CRC_SIZE;
> +
> +               net_process_received_packet(pkt_ptr, packet_len);
> +
> +               bytes_process +=
> +                       (packet_len + sizeof(struct rx_desc) + CRC_SIZE);
> +
> +               if (bytes_process % 8)
> +                       bytes_process = bytes_process + 8 - (bytes_process % 8);
> +       }
> +
> +       return 0;
> +}
> +
> +static void r8152_halt(struct eth_device *eth)
> +{
> +       struct ueth_data        *dev = (struct ueth_data *)eth->priv;
> +       struct r8152 *tp = (struct r8152 *)dev->dev_priv;
> +
> +       debug("** %s()\n", __func__);
> +
> +       tp->rtl_ops.disable(tp);
> +}
> +
> +static int r8152_write_hwaddr(struct eth_device *eth)
> +{
> +       struct ueth_data        *dev = (struct ueth_data *)eth->priv;
> +       struct r8152 *tp = (struct r8152 *)dev->dev_priv;
> +
> +       unsigned char enetaddr[8] = {0};
> +
> +       memcpy(enetaddr, eth->enetaddr, ETH_ALEN);
> +
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
> +       pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, enetaddr);
> +       ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
> +
> +       printf("MAC %pM\n", eth->enetaddr);

Is it reasonable to print here? This should probably be a debug() and
it should include something about it being written to the MAC filter
on the device.

> +       return 0;
> +}
> +
> +void r8152_eth_before_probe(void)
> +{
> +       curr_eth_dev = 0;
> +}
> +
> +
> +/* Probe to see if a new device is actually an asix device */

Perhaps you mean Realtek? Was this comment copied from the Asix driver?

> +int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum,
> +                     struct ueth_data *ss)
> +{
> +       struct usb_interface *iface;
> +       struct usb_interface_descriptor *iface_desc;
> +       int ep_in_found = 0, ep_out_found = 0;
> +       int i;
> +
> +       struct r8152 *tp;
> +
> +       /* let's examine the device now */
> +       iface = &dev->config.if_desc[ifnum];
> +       iface_desc = &dev->config.if_desc[ifnum].desc;
> +
> +       for (i = 0; r8152_dongles[i].vendor != 0; i++) {
> +               if (dev->descriptor.idVendor == r8152_dongles[i].vendor &&
> +                   dev->descriptor.idProduct == r8152_dongles[i].product)
> +                       /* Found a supported dongle */
> +                       break;
> +       }
> +
> +       if (r8152_dongles[i].vendor == 0)
> +               return 0;
> +
> +       memset(ss, 0, sizeof(struct ueth_data));
> +
> +       /* At this point, we know we've got a live one */
> +       debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
> +             dev->descriptor.idVendor, dev->descriptor.idProduct);
> +
> +       /* Initialize the ueth_data structure with some useful info */
> +       ss->ifnum = ifnum;
> +       ss->pusb_dev = dev;
> +       ss->subclass = iface_desc->bInterfaceSubClass;
> +       ss->protocol = iface_desc->bInterfaceProtocol;
> +
> +       /* alloc driver private */
> +       ss->dev_priv = calloc(1, sizeof(struct r8152));
> +
> +       if (!ss->dev_priv)
> +               return 0;
> +
> +       /*
> +        * We are expecting a minimum of 3 endpoints - in, out (bulk), and
> +        * int. We will ignore any others.
> +        */
> +       for (i = 0; i < iface_desc->bNumEndpoints; i++) {
> +               /* is it an BULK endpoint? */
> +               if ((iface->ep_desc[i].bmAttributes &
> +                    USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
> +                       u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
> +                       if (ep_addr & USB_DIR_IN) {
> +                               if (!ep_in_found) {
> +                                       ss->ep_in = ep_addr &
> +                                               USB_ENDPOINT_NUMBER_MASK;
> +                                       ep_in_found = 1;
> +                               }
> +                       } else {
> +                               if (!ep_out_found) {
> +                                       ss->ep_out = ep_addr &
> +                                               USB_ENDPOINT_NUMBER_MASK;
> +                                       ep_out_found = 1;
> +                               }
> +                       }
> +               }
> +
> +               /* is it an interrupt endpoint? */
> +               if ((iface->ep_desc[i].bmAttributes &
> +                   USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
> +                       ss->ep_int = iface->ep_desc[i].bEndpointAddress &
> +                               USB_ENDPOINT_NUMBER_MASK;
> +                       ss->irqinterval = iface->ep_desc[i].bInterval;
> +               }
> +       }
> +
> +       debug("Endpoints In %d Out %d Int %d\n",
> +             ss->ep_in, ss->ep_out, ss->ep_int);
> +
> +       /* Do some basic sanity checks, and bail if we find a problem */
> +       if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
> +           !ss->ep_in || !ss->ep_out || !ss->ep_int) {
> +               debug("Problems with device\n");
> +               return 0;
> +       }
> +
> +       dev->privptr = (void *)ss;
> +
> +       tp = ss->dev_priv;
> +       tp->udev = dev;
> +       tp->intf = iface;
> +
> +       r8152b_get_version(tp);
> +
> +       if (rtl_ops_init(tp))
> +               return 0;
> +
> +       tp->rtl_ops.init(tp);
> +       tp->rtl_ops.up(tp);
> +
> +       rtl8152_set_speed(tp, AUTONEG_ENABLE,
> +                         tp->supports_gmii ? SPEED_1000 : SPEED_100,
> +                         DUPLEX_FULL);
> +
> +       return 1;
> +}
> +
> +int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
> +                               struct eth_device *eth)
> +{
> +       if (!eth) {
> +               debug("%s: missing parameter.\n", __func__);
> +               return 0;
> +       }
> +
> +       sprintf(eth->name, "%s#%d", R8152_BASE_NAME, curr_eth_dev++);
> +       eth->init = r8152_init;
> +       eth->send = r8152_send;
> +       eth->recv = r8152_recv;
> +       eth->halt = r8152_halt;
> +       eth->write_hwaddr = r8152_write_hwaddr;
> +       eth->priv = ss;
> +
> +       /* Get the MAC address */
> +       if (r8152_read_mac(eth) < 0)
> +               return 0;
> +
> +       debug("MAC %pM\n", eth->enetaddr);
> +       return 1;
> +}
> diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c
> index 62d20f0..215b3d8 100644
> --- a/drivers/usb/eth/usb_ether.c
> +++ b/drivers/usb/eth/usb_ether.c
> @@ -180,6 +180,14 @@ static const struct usb_eth_prob_dev prob_dev[] = {
>                 .get_info = smsc95xx_eth_get_info,
>         },
>  #endif
> +#ifdef CONFIG_USB_ETHER_RTL8152
> +       {
> +               .before_probe = r8152_eth_before_probe,
> +               .probe = r8152_eth_probe,
> +               .get_info = r8152_eth_get_info,
> +       },
> +#endif
> +
>         { },            /* END */
>  };
>
> diff --git a/include/usb_ether.h b/include/usb_ether.h
> index c6d1416..51fce4e 100644
> --- a/include/usb_ether.h
> +++ b/include/usb_ether.h
> @@ -131,6 +131,12 @@ int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,
>                         struct ueth_data *ss);
>  int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
>                         struct eth_device *eth);
> +
> +void r8152_eth_before_probe(void);
> +int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum,
> +                   struct ueth_data *ss);
> +int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
> +                      struct eth_device *eth);
>  #endif
>
>  #endif /* __USB_ETHER_H__ */
> --
> 1.7.9.5
>
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