[U-Boot] [PATCH] Revert "imx: wdog: correct wcr register settings"

[Fabio Estevam]

On Thu, Oct 1, 2015 at 5:50 PM, Wolfgang Denk <wd at denx.de> wrote:

> On ARM (a LE architecture), clrsetbits_le16() maps down into:
>
>         clrsetbits_le16 ->
>         out_le16 / in_le16 ->
>         out_arch, w,le16 / in_arch, w,le16 ->
>         __raw_writew(cpu_to_le16()) / le16__to_cpu(__raw_readw()) ->
>         __raw_writew() / __raw_readw()
>
> while
>
>         writew() ->
>         __raw_writew(cpu_to_le16(v),__mem_pci(c))
>         __raw_writew()
>
> Both map into __raw_writew() [which then boild down into
> __arch_putw() which is just a volatile unsigned short write access.
>
> So both clrsetbits_le16() and writew() are little endian accessors.
> In which way would one write other data to the device than the other?

Yes, you are right.

The issue seems to be related to the effect of writing doing
'writew(WCR_WDE, &wdog->wcr)', which writes 0x40 to the register WCR
versus 'clrsetbits_le16(&wdog->wcr, 0, WCR_WDE)' which only enables
the WDE bit.

The kernel driver also does the full write to the WCR register(like we
used to have prior to 623d96e89aca6)
https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/tree/drivers/watchdog/imx2_wdt.c?id=refs/tags/v4.2.2#n86

This has also the effect of clearing the SRS bit.

By the way we need to implement erratum ERR004346 (WDOG: WDOG SRS bit
requires to be
written twice) in U-boot, but this is an unrelated issue.

So the revert seems to be appropriate. The commit log should be adjusted though.

Regards,

Fabio Estevam