[U-Boot] [PATCH 6/6] x86: Allow disabling IGD on Intel Queensbay

Simon Glass sjg at chromium.org
Sat Oct 3 16:29:25 CEST 2015


Hi Bin,

On 1 October 2015 at 08:36, Bin Meng <bmeng.cn at gmail.com> wrote:
> Add a Kconfig option to disable the Integrated Graphics Device (IGD)
> so that it does not show in the PCI configuration space as a VGA
> disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
> based graphics card's VGA BIOS and use that for the graphics console.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>
> ---
>
>  arch/x86/cpu/queensbay/Kconfig            |  8 ++++++++
>  arch/x86/cpu/queensbay/tnc.c              | 19 +++++++++++++++++++
>  arch/x86/include/asm/arch-queensbay/tnc.h |  5 +++++
>  include/configs/crownbay.h                |  1 +
>  4 files changed, 33 insertions(+)

Acked-by: Simon Glass <sjg at chromium.org>

But do we really want configs for such device-specific things? I
wonder if device tree would be better. E.g. add 'status = "disabled"'
in the PCI node.

>
> diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
> index fbf85f2..6136d75 100644
> --- a/arch/x86/cpu/queensbay/Kconfig
> +++ b/arch/x86/cpu/queensbay/Kconfig
> @@ -42,4 +42,12 @@ config CPU_ADDR_BITS
>         int
>         default 32
>
> +config DISABLE_IGD
> +       bool "Disable Integrated Graphics Device (IGD)"
> +       help
> +         Disable the Integrated Graphics Device (IGD) so that it does not
> +         show in the PCI configuration space as a VGA disaplay controller.
> +         This gives a chance for U-Boot to run PCI/PCIe based graphics
> +         card's VGA BIOS and use that card for the graphics console.
> +
>  endif
> diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
> index 9682cff..0c02a44 100644
> --- a/arch/x86/cpu/queensbay/tnc.c
> +++ b/arch/x86/cpu/queensbay/tnc.c
> @@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
>         x86_pci_write_config32(TNC_LPC, 0xd8, bc);
>  }
>
> +static void __maybe_unused disable_igd(void)
> +{
> +       u32 gc;
> +
> +       gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
> +       gc &= ~GMS_MASK;
> +       gc |= VGA_DISABLE;
> +       x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
> +}
> +
>  int arch_cpu_init(void)
>  {
>         int ret;
> @@ -39,6 +49,15 @@ int arch_cpu_init(void)
>         return 0;
>  }
>
> +int arch_early_init_r(void)
> +{
> +#ifdef CONFIG_DISABLE_IGD
> +       disable_igd();
> +#endif
> +
> +       return 0;
> +}
> +
>  void cpu_irq_init(void)
>  {
>         struct tnc_rcba *rcba;
> diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
> index ad9a6c4..2365394 100644
> --- a/arch/x86/include/asm/arch-queensbay/tnc.h
> +++ b/arch/x86/include/asm/arch-queensbay/tnc.h
> @@ -7,6 +7,11 @@
>  #ifndef _X86_ARCH_TNC_H_
>  #define _X86_ARCH_TNC_H_
>
> +/* IGD Control Register */
> +#define IGD_GC         0x50
> +#define VGA_DISABLE    0x00020000
> +#define GMS_MASK       0x00700000
> +
>  /* Memory BAR Enable */
>  #define MEM_BAR_EN     0x00000001
>
> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
> index 3153a74..7f91fff 100644
> --- a/include/configs/crownbay.h
> +++ b/include/configs/crownbay.h
> @@ -15,6 +15,7 @@
>
>  #define CONFIG_SYS_MONITOR_LEN         (1 << 20)
>  #define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_ARCH_EARLY_INIT_R
>  #define CONFIG_ARCH_MISC_INIT
>
>  #define CONFIG_SMSC_LPC47M
> --
> 1.8.2.1
>

Regards,
Simon


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