[U-Boot] [PATCH 00/13] x86: Provide a common MRC cache library and enable it for FSP

[Bin Meng]

Hi Simon,

On Mon, Oct 12, 2015 at 12:37 PM, Bin Meng <bmeng.cn at gmail.com> wrote:
> This series moves existing MRC cache codes in the ivybridge cpu
> diretory to a common place and makes some changes so that every
> x86 board benefits from it. It also updates FSP support codes
> to pass MRC cache data to fsp_init() to speed up boot time.
>
> Currently tested on Intel Bayley Bay board. Minnow Max board should
> work as it uses the same FSP that Bayley Bay uses. For Chromebook
> I cannot test that, but I see Simon added a TODO in the codes below:
>
>         /*
>          * TODO(sjg at chromium.org): Skip this for now as it causes boot
>          * problems
>          */
>         if (0) {
>                 pei_data->mrc_input = mrc_cache->data;
>                 pei_data->mrc_input_len = mrc_cache->data_size;
>         }
>
> I have no idea what breaks the MRC cache on the Chromebook board.
> Simon, you may retest this on top of this series to see if things
> go better.
>

Can you please try this patch on Chromebook?
http://patchwork.ozlabs.org/patch/528970/

I suspect this patch fixes the boot failures you saw before.

[snip]

Regards,
Bin