[U-Boot] [PATCH] vf610twr: Fix typo in DRAM init

[Stefan Agner]

Hi Tony,

I then realized that we are close to the release and submitted an
individual patch right away. So you don't need to create a patch. Thanks
for uncovering the bug and the offer. 

Patch, see:
https://patchwork.ozlabs.org/patch/529985/

--
Stefan

On 2015-10-14 16:29, Tony Felice wrote: 

> Hi Stefan,
> 
> Yes, I can submit the fix for the Colibri VF board as well - although I don't have the Colibri board to boot test on. I will be out of the office the next few days so I will submit next week.
> 
> Thanks,
> 
> Tony 
> 
> On Tue, Oct 13, 2015 at 10:47 PM, Stefan Agner <stefan at agner.ch> wrote:
> 
>> Hi Anthony,
>> 
>> Tested on a Tower, works for me.
>> 
>> Can you also fix the Colibri VF board? It seems to suffer the same
>> issue, introduced by the same commit...
>> 
>> --
>> Stefan
>> 
>> On 2015-10-09 13:38, Anthony Felice wrote:
>>> This commit fixes a typo in vf610twr DRAM init that was causing a hang in
>>> U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
>>> (vf610: refactor DDRMC code).
>>> 
>>> Signed-off-by: Anthony Felice <tony.felice at timesys.com>
>>> ---
>>> board/freescale/vf610twr/vf610twr.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>> 
>>> diff --git a/board/freescale/vf610twr/vf610twr.c
>>> b/board/freescale/vf610twr/vf610twr.c
>>> index a78e9e6..fa0075c 100644
>>> --- a/board/freescale/vf610twr/vf610twr.c
>>> +++ b/board/freescale/vf610twr/vf610twr.c
>>> @@ -108,7 +108,7 @@ int dram_init(void)
>>> .trcd_int = 6,
>>> .tras_lockout = 0,
>>> .tdal = 12,
>>> - .bstlen = 0,
>>> + .bstlen = 3,
>>> .tdll = 512,
>>> .trp_ab = 6,
>>> .tref = 3120,
> 
> -- 
> 
> Tony Felice
> Vybrid Technical Lead Timesys Corporation