[U-Boot] [PATCH] arm: ls1021atwr: optimize the deep sleep latency

[Yuantian Tang]

Hi York,

> -----Original Message-----
> From: York Sun [mailto:yorksun at freescale.com]
> Sent: Thursday, October 15, 2015 5:34 AM
> To: Tang Yuantian-B29983 <Yuantian.Tang at freescale.com>
> Cc: u-boot at lists.denx.de; Wang Huan-B18965 <alison.wang at freescale.com>;
> Kushwaha Prabhakar-B32579 <prabhakar at freescale.com>
> Subject: Re: [PATCH] arm: ls1021atwr: optimize the deep sleep latency
> 
> 
> 
> On 09/24/2015 12:52 AM, Tang Yuantian wrote:
> > It will take more than 1s when wake up from deep sleep. Most of the
> > time is spent on outputing information. This patch reduced the deep
> > sleep latency by:
> > 1. avoid outputing system informaton
> > 2. remove flush cache after DDR restore 3. skip reloading second stage
> > uboot binary when SD boot
> >
> > Signed-off-by: Tang Yuantian <Yuantian.Tang at freescale.com>
> > ---
> >  board/freescale/common/arm_sleep.c      |  4 ----
> >  board/freescale/ls1021atwr/ls1021atwr.c | 19 +++++++++++++++++--
> >  2 files changed, 17 insertions(+), 6 deletions(-)
> >
> > diff --git a/board/freescale/common/arm_sleep.c
> > b/board/freescale/common/arm_sleep.c
> > index 8e8b7fa..a498c65 100644
> > --- a/board/freescale/common/arm_sleep.c
> > +++ b/board/freescale/common/arm_sleep.c
> > @@ -12,7 +12,6 @@
> >  #include <asm/secure.h>
> >  #endif
> >  #include <asm/armv7.h>
> > -#include <asm/cache.h>
> >
> >  #if defined(CONFIG_LS102XA)
> >  #include <asm/arch/immap_ls102xa.h>
> > @@ -65,8 +64,6 @@ static void dp_ddr_restore(void)
> >
> >  	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
> >  		*dst++ = *src++;
> > -
> > -	flush_dcache_all();
> >  }
> >
> >  static void dp_resume_prepare(void)
> > @@ -74,7 +71,6 @@ static void dp_resume_prepare(void)
> >  	dp_ddr_restore();
> >  	board_sleep_prepare();
> >  	armv7_init_nonsec();
> > -	cleanup_before_linux();
> >  #ifdef CONFIG_U_QE
> >  	u_qe_resume();
> >  #endif
> > diff --git a/board/freescale/ls1021atwr/ls1021atwr.c
> > b/board/freescale/ls1021atwr/ls1021atwr.c
> > index 228dbf8..236376b 100644
> > --- a/board/freescale/ls1021atwr/ls1021atwr.c
> > +++ b/board/freescale/ls1021atwr/ls1021atwr.c
> > @@ -521,8 +521,10 @@ int board_early_init_f(void)
> >  	}
> >
> >  #if defined(CONFIG_DEEP_SLEEP)
> > -	if (is_warm_boot())
> > -		fsl_dp_disable_console();
> > +	if (is_warm_boot()) {
> > +		timer_init();
> > +		dram_init();
> > +	}
> >  #endif
> >
> >  	return 0;
> > @@ -531,6 +533,8 @@ int board_early_init_f(void)  #ifdef
> > CONFIG_SPL_BUILD  void board_init_f(ulong dummy)  {
> > +	void (*second_uboot)(void);
> > +
> >  	/* Clear the BSS */
> >  	memset(__bss_start, 0, __bss_end - __bss_start);
> >
> > @@ -551,6 +555,17 @@ void board_init_f(ulong dummy)
> >  	enable_devices_ns_access(&ns_dev[7], 1);  #endif
> >
> > +	/*
> > +	 * if it is woken up from deep sleep, then jump to second
> > +	 * stage uboot and continue executing without recopying
> > +	 * it from SD since it has already been reserved in memeory
> > +	 * in last boot.
> > +	 */
> > +	if (is_warm_boot()) {
> > +		second_uboot = (void (*)(void))CONFIG_SYS_TEXT_BASE;
> > +		second_uboot();
> > +	}
> > +
> >  	board_init_r(NULL, 0);
> >  }
> >  #endif
> >
> 
> Yuantian,
> 
> Please explain more why the second stage u-boot is reserved? Wouldn't
> Linux overwrite the memory?
> 
If both CONFIG_DEEP_SLEEP and CONFIG_SD_BOOT are defined,
The DDR memory the second stage uboot occupied whould be reserved.
It is achieved in commit: 41ba57d0c which is the first patch to add the deep sleep support.

This patch doesn't reserve any memory, it just utilized the fact that the second stage uboot has been reserved already if deep sleep is enabled.

Regards,
Yuantian

> York