[U-Boot] [PATCH 9/9] x86: ivybridge: Enable the MRC cache

[Simon Glass]

From: Bin Meng <bmeng.cn at gmail.com>

This works correctly now, so enable it.

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
Dropped malloc() and adjusted commit message:
Signed-off-by: Simon Glass <sjg at chromium.org>

---

 arch/x86/cpu/ivybridge/sdram.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index d9b3dfc..4372a5c 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -158,14 +158,8 @@ static int prepare_mrc_cache(struct pei_data *pei_data)
 	if (!mrc_cache)
 		return -ENOENT;
 
-	/*
-	 * TODO(sjg at chromium.org): Skip this for now as it causes boot
-	 * problems
-	 */
-	if (0) {
-		pei_data->mrc_input = mrc_cache->data;
-		pei_data->mrc_input_len = mrc_cache->data_size;
-	}
+	pei_data->mrc_input = mrc_cache->data;
+	pei_data->mrc_input_len = mrc_cache->data_size;
 	debug("%s: at %p, size %x checksum %04x\n", __func__,
 	      pei_data->mrc_input, pei_data->mrc_input_len,
 	      mrc_cache->checksum);
-- 
2.6.0.rc2.230.g3dd15c0