[U-Boot] [PATCH V2 01/14] mxs: add parameter base_addr for mxs_set_lcdclk

[Peng Fan]

Change mxs_set_lcdclk prototype to add a new parameter
base_addr. There are two LCD interfaces for i.MX6SX,
we may support LCDIF1 or LCDIF2.

Signed-off-by: Peng Fan <Peng.Fan at freescale.com>
Cc: Stefano Babic <sbabic at denx.de>
Cc: Anatolij Gustschin <agust at denx.de>
---

V2:
 none

 arch/arm/cpu/arm926ejs/mxs/clock.c    | 2 +-
 arch/arm/include/asm/arch-mxs/clock.h | 2 +-
 drivers/video/mxsfb.c                 | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index e9d8800..dac8dc6 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -309,7 +309,7 @@ void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)
 		bus, tgtclk, freq);
 }
 
-void mxs_set_lcdclk(uint32_t freq)
+void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
diff --git a/arch/arm/include/asm/arch-mxs/clock.h b/arch/arm/include/asm/arch-mxs/clock.h
index fc9d75b..8840335 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -46,7 +46,7 @@ uint32_t mxc_get_clock(enum mxc_clock clk);
 void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
 void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
 void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
-void mxs_set_lcdclk(uint32_t freq);
+void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq);
 
 /* Compatibility with the FEC Ethernet driver */
 #define	imx_get_fecclk()	mxc_get_clock(MXC_AHB_CLK)
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 03b0f88..eed57d5 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -55,7 +55,7 @@ static void mxs_lcd_init(GraphicDevice *panel,
 	uint8_t valid_data = 0;
 
 	/* Kick in the LCDIF clock */
-	mxs_set_lcdclk(PS2KHZ(mode->pixclock));
+	mxs_set_lcdclk(MXS_LCDIF_BASE, PS2KHZ(mode->pixclock));
 
 	/* Restart the LCDIF block */
 	mxs_reset_block(&regs->hw_lcdif_ctrl_reg);
-- 
1.8.4