[U-Boot] [PATCH 0/4] ARM: tegra: GPU WPR region support

[Tom Warren]

Alex,

> -----Original Message-----
> From: Alexandre Courbot [mailto:gnurou at gmail.com]
> Sent: Wednesday, October 28, 2015 2:13 AM
> To: Tom Warren <TWarren at nvidia.com>
> Cc: Alex Courbot <acourbot at nvidia.com>; Stephen Warren
> <swarren at nvidia.com>; Thierry Reding <treding at nvidia.com>; u-
> boot at lists.denx.de; linux-tegra at vger.kernel.org
> Subject: Re: [PATCH 0/4] ARM: tegra: GPU WPR region support
> 
> On Wed, Oct 28, 2015 at 12:57 AM, Tom Warren <TWarren at nvidia.com>
> wrote:
> > Sorry, Alex. Missed these.
> >
> >> -----Original Message-----
> >> From: Alexandre Courbot [mailto:gnurou at gmail.com]
> >> Sent: Sunday, October 25, 2015 10:50 PM
> >> To: Alex Courbot <acourbot at nvidia.com>
> >> Cc: Tom Warren <TWarren at nvidia.com>; Stephen Warren
> >> <swarren at nvidia.com>; Thierry Reding <treding at nvidia.com>; u-
> >> boot at lists.denx.de; linux-tegra at vger.kernel.org
> >> Subject: Re: [PATCH 0/4] ARM: tegra: GPU WPR region support
> >>
> >> Ping Tom, how does this look to you?
> > Looks pretty good, but what about saving the security_carveout reg settings
> back to the BCT or scratch regs so those settings will be restored on LP0
> resume?
> 
> Absolutely - I am not familiar at all with BCT or scratch registers (and U-boot in
> general :) ) though, could you point me to some part of the code which I could
> use as a reference for this?
> 
> Also, how can I decide which mechanism to use over the other?
I'll have to refresh my meat RAM on how U-Boot handles LP0 WRT BCT/scratch regs, but in coreboot I had to 'flush' the updated carveout regs back to the BCT copy in SDRAM so that they'd be properly restored on resume. I only pushed the modified regs (BOM and CFG0, IIRC).  If you have access to Google's coreboot repo, look in src/soc/nvidia/tegra210/sdram_lp0.c, commit ID 920968258. Or just Google for sdram_lp0.c, should be the top hit.

> 
> Thanks,
> Alex.