[U-Boot] [PATCH] mvebu: usb: Add missing controller reset after initialization

Phil Sutter phil at nwl.cc
Mon Jan 4 04:02:26 CET 2016


Hi,

On Mon, Jan 04, 2016 at 12:47:37AM +0100, Marek Vasut wrote:
> On Monday, January 04, 2016 at 12:38:07 AM, Phil Sutter wrote:
> > The bit which really was missing is the USB mode setting I smuggled in
> > along with my patch - setting the devices to host mode is sufficient for
> > Linux to successfully enumerate the HCD.
> 
> OK, so the controller is OTG capable and upon reset, it's in Gadget mode?

Yes, seems it's capable. Upon reset, register 0x501a0 contains value 0.
Trying to print register 0x511a0 freezes U-Boot for me.

> > Checking the logs of the vendor's U-Boot fork, it appears that devices 1
> > and 2 are configured to host mode, while the third is set to device
> > mode. I changed my code to copy that, but am not sure it's necessary at
> > all: The DS414 exports only a single port of the SoC's EHCI, and Linux
> > 
> > detects that:
> > | orion-ehci f1050000.usb: EHCI Host Controller
> > | orion-ehci f1050000.usb: new USB bus registered, assigned bus number 3
> > | orion-ehci f1050000.usb: irq 27, io mem 0xf1050000
> > | orion-ehci f1050000.usb: USB 2.0 started, EHCI 1.00
> > | hub 3-0:1.0: USB hub found
> > | hub 3-0:1.0: 1 port detected
> > 
> > OTOH I'm not sure how far this configuration is device specific in the
> > first place. What puzzles me is that I couldn't find a reference to this
> > USB mode register at 0x501A8 in Marvell's MV78230 specs, still it seems
> > to be crucial. Does anyone of you have this register referenced in some
> > Marvell datasheet somewhere?
> 
> It's the USBMODE register, see for example [1] . It's part of EHCI cores
> which are OTG capable.
> 
> [1] http://lxr.free-electrons.com/source/drivers/usb/host/ehci-hcd.c#L179

Interesting. I would have expected this to show up in MV78230 specs, but
maybe I missed the part where it clarifies these offsets to be standard
conformant.

> > Maybe there's also a more generic way to do this, 'usb start' (which
> > solves the problem without any changes to the SoC init code) seems to
> > not address this register.
> 
> Probably add a fixup into ehci-orion.c in Linux or something along those
> lines. It should configure the code according to the "dr_mode" DT prop.

Hmm. Searching through the relevant DT files didn't yield a result for
"dr_mode". Seems like this property is missing, maybe that's why Linux
fails here? Is this something generally user-configurable? (Note that I
don't have the slightest idea of how device mode USB works in Linux).

Thanks, Phil


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