[U-Boot] [PATCH v2 13/13] board: Add gpio and ethernet support to pic32mzdask board.
Purna Chandra Mandal
purna.mandal at microchip.com
Mon Jan 4 15:02:45 CET 2016
Signed-off-by: Purna Chandra Mandal <purna.mandal at microchip.com>
---
Changes in v2:
- replace unbounded loop with wait_for_bit()
- replace register access as readl/writel(base + offset)
- translate (dts provided) physical address to MIPS kseg1 address before use
arch/mips/dts/pic32mzda.dtsi | 93 ++++++++++++++++++++++++++++++++++++++++++
arch/mips/dts/pic32mzda_sk.dts | 5 +++
configs/pic32mzdask_defconfig | 11 ++++-
include/configs/pic32mzdask.h | 30 +++++++++++++-
4 files changed, 136 insertions(+), 3 deletions(-)
diff --git a/arch/mips/dts/pic32mzda.dtsi b/arch/mips/dts/pic32mzda.dtsi
index bdddb93..a354037 100644
--- a/arch/mips/dts/pic32mzda.dtsi
+++ b/arch/mips/dts/pic32mzda.dtsi
@@ -5,6 +5,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/microchip,clock.h>
#include "skeleton.dtsi"
@@ -12,6 +13,19 @@
/ {
compatible = "microchip,pic32mzda", "microchip,pic32mz";
+ aliases {
+ gpio0 = &gpioA;
+ gpio1 = &gpioB;
+ gpio2 = &gpioC;
+ gpio3 = &gpioD;
+ gpio4 = &gpioE;
+ gpio5 = &gpioF;
+ gpio6 = &gpioG;
+ gpio7 = &gpioH;
+ gpio8 = &gpioJ;
+ gpio9 = &gpioK;
+ };
+
cpus {
cpu at 0 {
compatible = "mips,mips14kc";
@@ -62,6 +76,76 @@
status = "disabled";
};
+ gpioA: gpio0 at 1f860000 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860000 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioB: gpio1 at 1f860100 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860100 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioC: gpio2 at 1f860200 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860200 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioD: gpio3 at 1f860300 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860300 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioE: gpio4 at 1f860400 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860400 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioF: gpio5 at 1f860500 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860500 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioG: gpio6 at 1f860600 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860600 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioH: gpio7 at 1f860700 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860700 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioJ: gpio8 at 1f860800 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860800 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpioK: gpio9 at 1f860900 {
+ compatible = "microchip,pic32mzda-gpio";
+ reg = <0x1f860900 0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
sdhci: sdhci at 1f8ec000 {
compatible = "microchip,pic32mzda-sdhci";
reg = <0x1f8ec000 0x100>;
@@ -74,4 +158,13 @@
clock-irq-pins = <1>,<1>;
status = "disabled";
};
+
+ ethernet: ethernet at 1f882000 {
+ compatible = "microchip,pic32mzda-eth";
+ reg = <0x1f882000 0x1000>;
+ interrupts = <153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock PB5CLK>;
+ phy-mode = "rmii";
+ status = "disabled";
+ };
};
diff --git a/arch/mips/dts/pic32mzda_sk.dts b/arch/mips/dts/pic32mzda_sk.dts
index f886a0f..fb69a4c 100644
--- a/arch/mips/dts/pic32mzda_sk.dts
+++ b/arch/mips/dts/pic32mzda_sk.dts
@@ -42,4 +42,9 @@
&sdhci {
status = "okay";
+};
+
+ðernet {
+ reset-gpios = <&gpioJ 15 0>;
+ status = "okay";
};
\ No newline at end of file
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index d11eddd..6b20e68 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -6,6 +6,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_HUSH_PARSER=y
CONFIG_SYS_PROMPT="dask # "
+CONFIG_CMD_NET=y
CONFIG_CMD_TIME=y
# CONFIG_CMD_IMLS is not set
CONFIG_SUPPORT_OF_CONTROL=y
@@ -20,4 +21,12 @@ CONFIG_PINCTRL=y
# CONFIG_PINCTRL_FULL is not set
CONFIG_PIC32_PINCTRL=y
CONFIG_DM_MMC=y
-CONFIG_PIC32_SDHCI=y
\ No newline at end of file
+CONFIG_PIC32_SDHCI=y
+CONFIG_DM_GPIO=y
+CONFIG_CMD_GPIO=y
+CONFIG_PIC32_GPIO=y
+CONFIG_NET=y
+CONFIG_DM_ETH=y
+CONFIG_PHYLIB=y
+CONFIG_NETDEVICES=y
+CONFIG_PIC32_ETH=y
\ No newline at end of file
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 52e53e9..d08f6ad 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -79,6 +79,28 @@
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_CMDLINE_EDITING 1
+/*-----------------------------------------------------------------------
+ * Networking Configuration
+ */
+#define CONFIG_MII
+#define CONFIG_PHY_SMSC
+#define CONFIG_PHY_ADDR 0 /* LAN87XX */
+#define CONFIG_SYS_RX_ETH_BUFFER 8
+#define CONFIG_NET_RETRY_COUNT 20
+#define CONFIG_ARP_TIMEOUT 500 /* millisec */
+
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
/*
* Handover flattened device tree (dtb file) to Linux kernel
*/
@@ -133,12 +155,16 @@
"importbootenv= " \
"env import -t -r ${uenvaddr} ${filesize};\0" \
\
+ "tftploadenv=tftp ${uenvaddr} ${uenvfile} \0" \
+ "tftploadscr=tftp ${uenvaddr} ${scriptfile} \0" \
+ "tftploadub=tftp ${loadaddr} ${ubootfile} \0" \
+ \
"mmcloadenv=fatload mmc 0 ${uenvaddr} ${uenvfile}\0" \
"mmcloadscr=fatload mmc 0 ${uenvaddr} ${scriptfile}\0" \
"mmcloadub=fatload mmc 0 ${loadaddr} ${ubootfile}\0" \
\
- "loadbootenv=run mmcloadenv\0" \
- "loadbootscr=run mmcloadscr\0" \
+ "loadbootenv=run mmcloadenv || run tftploadenv\0" \
+ "loadbootscr=run mmcloadscr || run tftploadscr\0" \
"bootcmd_root= " \
"if run loadbootenv; then " \
"echo Loaded environment ${uenvfile}; " \
--
1.8.3.1
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