[U-Boot] [PATCH 1/2] Revert "powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot"

Bin Meng bmeng.cn at gmail.com
Thu Jan 14 16:09:20 CET 2016


On Thu, Jan 14, 2016 at 4:41 PM, Aneesh Bansal <aneesh.bansal at nxp.com> wrote:
> This reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3.
>

Could you please add some words in the commit message to explain the
reason of this revert?

> Signed-off-by: Aneesh Bansal <aneesh.bansal at nxp.com>
> CC: Ruchika Gupta <ruchika.gupta at nxp.com>
> ---
>  arch/powerpc/cpu/mpc85xx/cpu_init.c   | 9 +--------
>  arch/powerpc/include/asm/immap_85xx.h | 1 -
>  2 files changed, 1 insertion(+), 9 deletions(-)
>
> diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
> index 13a7d0f..c738c96 100644
> --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
> +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
> @@ -425,8 +425,7 @@ void fsl_erratum_a007212_workaround(void)
>  ulong cpu_init_f(void)
>  {
>         extern void m8560_cpm_reset (void);
> -#if defined(CONFIG_SYS_DCSRBAR_PHYS) || \
> -       (defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET))
> +#ifdef CONFIG_SYS_DCSRBAR_PHYS
>         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
>  #endif
>  #if defined(CONFIG_SECURE_BOOT)
> @@ -458,12 +457,6 @@ ulong cpu_init_f(void)
>  #if defined(CONFIG_SYS_CPC_REINIT_F)
>         disable_cpc_sram();
>  #endif
> -
> -#if defined(CONFIG_FSL_CORENET)
> -       /* Put PAMU in bypass mode */
> -       out_be32(&gur->pamubypenr, FSL_CORENET_PAMU_BYPASS);
> -#endif
> -
>  #endif
>
>  #ifdef CONFIG_CPM2
> diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
> index 101b8db..667a97e 100644
> --- a/arch/powerpc/include/asm/immap_85xx.h
> +++ b/arch/powerpc/include/asm/immap_85xx.h
> @@ -1933,7 +1933,6 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
>         u8      res24[64];
>         u32     pblsr;          /* Preboot loader status */
>         u32     pamubypenr;     /* PAMU bypass enable */
> -#define FSL_CORENET_PAMU_BYPASS                0xffff0000
>         u32     dmacr1;         /* DMA control */
>         u8      res25[4];
>         u32     gensr1;         /* General status */
> --

Regards,
Bin


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