[U-Boot] [PATCH v4 5/6] MIPS: implement bit manipulating I/O accessors

[Daniel Schwierzeck]

Add support for functions clrbits_X(), setbits_X() and clrsetbits_X()
on MIPS.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>


---
@Wills, after rebasing my own SoC code to this series and trying to use the new accessors
I've hit the same problems with endianess in a driver. My drivers have to support Big and
Little Endian, thus I have to use __raw_readX/__raw_writeX. So I also added variants
of the new accessors without swapping and a similar behaviour as __raw_readX/__raw_writeX.
This should address your concers too.

Changes in v4:
- added clrbits_X(), setbits_X() and clrsetbits_X() variants without endianess swapping

Changes in v3: None
Changes in v2: None

 arch/mips/include/asm/io.h | 55 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index eb06afa..b8ac5a5 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -541,4 +541,59 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags)
 {
 }
 
+#define __BUILD_CLRBITS(bwlq, sfx, end, type)				\
+									\
+static inline void clrbits_##sfx(volatile void __iomem *mem, type clr)	\
+{									\
+	type __val = __raw_read##bwlq(mem);				\
+	__val = end##_to_cpu(__val);					\
+	__val &= ~clr;							\
+	__val = cpu_to_##end(__val);					\
+	__raw_write##bwlq(__val, mem);					\
+}
+
+#define __BUILD_SETBITS(bwlq, sfx, end, type)				\
+									\
+static inline void setbits_##sfx(volatile void __iomem *mem, type set)	\
+{									\
+	type __val = __raw_read##bwlq(mem);				\
+	__val = end##_to_cpu(__val);					\
+	__val |= set;							\
+	__val = cpu_to_##end(__val);					\
+	__raw_write##bwlq(__val, mem);					\
+}
+
+#define __BUILD_CLRSETBITS(bwlq, sfx, end, type)			\
+									\
+static inline void clrsetbits_##sfx(volatile void __iomem *mem,		\
+					type clr, type set)		\
+{									\
+	type __val = __raw_read##bwlq(mem);				\
+	__val = end##_to_cpu(__val);					\
+	__val &= ~clr;							\
+	__val |= set;							\
+	__val = cpu_to_##end(__val);					\
+	__raw_write##bwlq(__val, mem);					\
+}
+
+#define BUILD_CLRSETBITS(bwlq, sfx, end, type)				\
+									\
+__BUILD_CLRBITS(bwlq, sfx, end, type)					\
+__BUILD_SETBITS(bwlq, sfx, end, type)					\
+__BUILD_CLRSETBITS(bwlq, sfx, end, type)
+
+#define __to_cpu(v)		(v)
+#define cpu_to__(v)		(v)
+
+BUILD_CLRSETBITS(b, 8, _, u8)
+BUILD_CLRSETBITS(w, le16, le16, u16)
+BUILD_CLRSETBITS(w, be16, be16, u16)
+BUILD_CLRSETBITS(w, 16, _, u16)
+BUILD_CLRSETBITS(l, le32, le32, u32)
+BUILD_CLRSETBITS(l, be32, be32, u32)
+BUILD_CLRSETBITS(l, 32, _, u32)
+BUILD_CLRSETBITS(q, le64, le64, u64)
+BUILD_CLRSETBITS(q, be64, be64, u64)
+BUILD_CLRSETBITS(q, 64, _, u64)
+
 #endif /* _ASM_IO_H */
-- 
2.5.0