[U-Boot] [PATCH] x86: WIP: Various dts fixes

[Bin Meng]

This patch should be squashed into Simon's patch [1], to fix booting
issues seen on Crown Bay.

[1]: http://patchwork.ozlabs.org/patch/569189/

Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
---
 arch/x86/dts/bayleybay.dts          |  2 +-
 arch/x86/dts/broadwell_som-6896.dts |  1 +
 arch/x86/dts/chromebox_panther.dts  |  1 +
 arch/x86/dts/crownbay.dts           | 24 ++++++++++++------------
 arch/x86/dts/galileo.dts            |  1 +
 arch/x86/dts/qemu-x86_q35.dts       |  2 +-
 6 files changed, 17 insertions(+), 14 deletions(-)

diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 87d809b..9bf707b 100644
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -118,7 +118,7 @@
 
 		pch at 1f,0 {
 			reg = <0x0000f800 0 0 0 0>;
-			compatible = "intel,pch7";
+			compatible = "intel,pch9";
 
 			irq-router {
 				compatible = "intel,irq-router";
diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts
index 57a2943..4e9e410 100644
--- a/arch/x86/dts/broadwell_som-6896.dts
+++ b/arch/x86/dts/broadwell_som-6896.dts
@@ -33,6 +33,7 @@
 		pch at 1f,0 {
 			reg = <0x0000f800 0 0 0 0>;
 			compatible = "intel,pch9";
+
 			spi {
 				#address-cells = <1>;
 				#size-cells = <0>;
diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts
index bc0c7bb..2302701 100644
--- a/arch/x86/dts/chromebox_panther.dts
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -55,6 +55,7 @@
 		pch at 1f,0 {
 			reg = <0x0000f800 0 0 0 0>;
 			compatible = "intel,pch9";
+
 			spi {
 				#address-cells = <1>;
 				#size-cells = <0>;
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 30329b5..8ab4393 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -98,18 +98,6 @@
 			u-boot,dm-pre-reloc;
 			reg = <0x0000b800 0x0 0x0 0x0 0x0>;
 
-			spi {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "intel,ich-spi";
-				spi-flash at 0 {
-					reg = <0>;
-					compatible = "sst,25vf016b",
-						"spi-flash";
-					memory-map = <0xffe00000 0x00200000>;
-				};
-			};
-
 			topcliff at 0,0 {
 				#address-cells = <3>;
 				#size-cells = <2>;
@@ -242,6 +230,18 @@
 					PCI_BDF(2, 12, 4) INTC PIRQC
 				>;
 			};
+
+			spi {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "intel,ich-spi";
+				spi-flash at 0 {
+					reg = <0>;
+					compatible = "sst,25vf016b",
+						"spi-flash";
+					memory-map = <0xffe00000 0x00200000>;
+				};
+			};
 		};
 	};
 
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 4eca325..9d82bb3 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -81,6 +81,7 @@
 
 		pch at 1f,0 {
 			reg = <0x0000f800 0 0 0 0>;
+			compatible = "intel,pch7";
 
 			irq-router {
 				compatible = "intel,irq-router";
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 114e2d5..5d601b3 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -64,7 +64,7 @@
 
 		pch at 1f,0 {
 			reg = <0x0000f800 0 0 0 0>;
-			compatible = "intel,pch7";
+			compatible = "intel,pch9";
 
 			irq-router {
 				compatible = "intel,irq-router";
-- 
1.8.2.1