[U-Boot] [PATCH] x86: baytrail: Add documentation for FSP memory-down values

Bin Meng bmeng.cn at gmail.com
Tue Jan 19 07:39:05 CET 2016


On Mon, Jan 18, 2016 at 6:55 PM, Stefan Roese <sr at denx.de> wrote:
> This patch adds the documentation for the memory-down parameters
> of the Intel FSP. To configure a board without SPD DDR DIMM but
> with onboard DDR chips. The values are taken from the coreboot
> header:
>
>         src/soc/intel/fsp_baytrail/chip.h
>
> (git ID da1a70ea from 2016-01-16 as reference).
>
> Signed-off-by: Stefan Roese <sr at denx.de>
> Cc: Andrew Bradford <andrew.bradford at kodakalaris.com>
> Cc: Bin Meng <bmeng.cn at gmail.com>
> Cc: Simon Glass <sjg at chromium.org>
> ---
>  .../misc/intel,baytrail-fsp.txt                    | 31 +++++++++++++++++++++-
>  1 file changed, 30 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>


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