[U-Boot] [PATCH 2/3] ARMv8/layerscape: Add FSL PPA support
Zhiqiang Hou
zhiqiang.hou at nxp.com
Wed Jan 20 09:41:23 CET 2016
Hi Prabhakar,
Thanks for your feedback!
> -----Original Message-----
> From: Prabhakar Kushwaha
> Sent: 2016年1月19日 22:07
> To: Zhiqiang Hou <Zhiqiang.Hou at freescale.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; Mingkai.hu at freescale.com; yorksun at freescale.com
> Cc: leoli at freescale.com; prabhakar at freescale.com;
> bhupesh.sharma at freescale.com; sjg at chromium.org; bmeng.cn at gmail.com;
> hs at denx.de; joe.hershberger at ni.com; marex at denx.de; Zhiqiang Hou
> <zhiqiang.hou at nxp.com>; Hou Zhiqiang <B48286 at freescale.com>
> Subject: RE: [PATCH 2/3] ARMv8/layerscape: Add FSL PPA support
>
> > -----Original Message-----
> > From: Zhiqiang Hou [mailto:Zhiqiang.Hou at freescale.com]
> > Sent: Tuesday, January 19, 2016 6:10 PM
> > To: u-boot at lists.denx.de; albert.u.boot at aribaud.net;
> > Mingkai.hu at freescale.com; yorksun at freescale.com
> > Cc: leoli at freescale.com; prabhakar at freescale.com;
> > bhupesh.sharma at freescale.com; sjg at chromium.org; bmeng.cn at gmail.com;
> > hs at denx.de; joe.hershberger at ni.com; marex at denx.de; Zhiqiang Hou
> > <zhiqiang.hou at nxp.com>; Hou Zhiqiang <B48286 at freescale.com>
> > Subject: [PATCH 2/3] ARMv8/layerscape: Add FSL PPA support
> >
> > From: Hou Zhiqiang <B48286 at freescale.com>
> >
> > The FSL Primary Protected Application (PPA) is a software component
> > loaded during boot which runs in TrustZone and remains resident after boot.
> >
> > Signed-off-by: Hou Zhiqiang <B48286 at freescale.com>
> > ---
> > arch/arm/cpu/armv8/fsl-layerscape/Makefile | 1 +
> > arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 196
> > +++++++++++++++++++++++++
> > arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S | 37 +++++
> > arch/arm/include/asm/arch-fsl-layerscape/ppa.h | 15 ++
> > 4 files changed, 249 insertions(+)
> > create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> > create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa_entry.S
> > create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/ppa.h
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > index cce7405..27bfeb1 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > @@ -10,6 +10,7 @@ obj-y += soc.o
> > obj-$(CONFIG_MP) += mp.o
> > obj-$(CONFIG_OF_LIBFDT) += fdt.o
> > obj-$(CONFIG_SPL) += spl.o
> > +obj-$(CONFIG_FSL_LS_PPA) += ppa.o ppa_entry.o
> >
> > ifneq ($(CONFIG_FSL_LSCH3),)
> > obj-y += fsl_lsch3_speed.o
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> > new file mode 100644
> > index 0000000..15e4f8b
> > --- /dev/null
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> > @@ -0,0 +1,196 @@
> > +/*
> > + * Copyright 2015 Freescale Semiconductor, Inc.
> > + *
> > + * SPDX-License-Identifier: GPL-2.0+
> > + */
> > +#include <common.h>
> > +#include <config.h>
> > +#include <errno.h>
> > +#include <malloc.h>
> > +#include <asm/system.h>
> > +#include <asm/io.h>
> > +#include <asm/types.h>
> > +#include <asm/macro.h>
> > +#include <asm/arch/soc.h>
> > +#include <asm/arch/immap_lsch2.h>
> > +#include <asm/arch/ppa.h>
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +extern void c_runtime_cpu_setup(void);
> > +
> > +#define LS_PPA_FIT_FIRMWARE_IMAGE "firmware"
> > +#define LS_PPA_FIT_CNF_NAME "config at 1"
> > +#define PPA_MEM_SIZE_ENV_VAR "ppamemsize"
> > +
> > +/*
>
>
> <snip>
>
> > +#include <config.h>
> > +#include <linux/linkage.h>
> > +#include <asm/system.h>
> > +#include <asm/macro.h>
> > +
> > +ADDR_BASE_SCFG:
> > + .long 0x01570000
>
> If I am correct it is address of BOOLPTR. This address looks to be specific to
> LS1043.
> For other SoC it may change
>
Yes, I will make it a common interface for ARMv8 Layerscape platform in next version.
>
> > +
> > +ENTRY(ppa_init)
> > +/* Save stack pointer for EL2 */
> > + mov x1, sp
> > + msr sp_el2, x1
> > +
> > +/* Set boot loc pointer */
> > + adr x4, 1f
> > + adr x1, ADDR_BASE_SCFG
> > + ldr w2, [x1]
> > + mov x1, x4
> > + rev w3, w1
> > + str w3, [x2, #0x604]
>
> It is LS1043 specific
>
>
> > + lsr x1, x4, #32
> > + rev w3, w1
> > + str w3, [x2, #0x600]
> Same as above
>
Thanks,
Zhiqiang
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