[U-Boot] [PATCH v2 2/3] armv8/ls1043aqds: Spilt off board device tree

Wenbin Song wenbin.song at nxp.com
Wed Jan 20 13:25:43 CET 2016


Move new /chosen node out of the board device tree.

Signed-off-by: Wenbin Song <wenbin.song at nxp.com>
---
 arch/arm/dts/Makefile                  |   2 +-
 arch/arm/dts/fsl-ls1043a-qds-duart.dts |  20 ++++++
 arch/arm/dts/fsl-ls1043a-qds.dts       | 124 ---------------------------------
 arch/arm/dts/fsl-ls1043a-qds.dtsi      | 123 ++++++++++++++++++++++++++++++++
 configs/ls1043aqds_defconfig           |   2 +-
 5 files changed, 145 insertions(+), 126 deletions(-)
 create mode 100644 arch/arm/dts/fsl-ls1043a-qds-duart.dts
 delete mode 100644 arch/arm/dts/fsl-ls1043a-qds.dts
 create mode 100644 arch/arm/dts/fsl-ls1043a-qds.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7706b41..302456c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -96,7 +96,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
 	ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb
 dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
 	fsl-ls2080a-rdb.dtb
-dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \
+dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 	fsl-ls1043a-rdb.dtb
 
 dtb-$(CONFIG_MACH_SUN4I) += \
diff --git a/arch/arm/dts/fsl-ls1043a-qds-duart.dts b/arch/arm/dts/fsl-ls1043a-qds-duart.dts
new file mode 100644
index 0000000..2715b3d
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1043a-qds-duart.dts
@@ -0,0 +1,20 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright (C) 2015, Freescale Semiconductor
+ *
+ * Wenbin Song <wenbin.song at nxp.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "fsl-ls1043a-qds.dtsi"
+
+/ {
+       chosen {
+               stdout-path = &duart0;
+       };
+};
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dts b/arch/arm/dts/fsl-ls1043a-qds.dts
deleted file mode 100644
index 7435222..0000000
--- a/arch/arm/dts/fsl-ls1043a-qds.dts
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Device Tree Include file for Freescale Layerscape-1043A family SoC.
- *
- * Copyright (C) 2015, Freescale Semiconductor
- *
- * Mingkai Hu <Mingkai.hu at freescale.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-/dts-v1/;
-/include/ "fsl-ls1043a.dtsi"
-
-/ {
-	model = "LS1043A QDS Board";
-};
-
-&i2c0 {
-	status = "okay";
-	pca9547 at 77 {
-		compatible = "philips,pca9547";
-		reg = <0x77>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		i2c at 0 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x0>;
-
-			rtc at 68 {
-				compatible = "dallas,ds3232";
-				reg = <0x68>;
-				/* IRQ10_B */
-				interrupts = <0 150 0x4>;
-			};
-		};
-
-		i2c at 2 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x2>;
-
-			ina220 at 40 {
-				compatible = "ti,ina220";
-				reg = <0x40>;
-				shunt-resistor = <1000>;
-			};
-
-			ina220 at 41 {
-				compatible = "ti,ina220";
-				reg = <0x41>;
-				shunt-resistor = <1000>;
-			};
-		};
-
-		i2c at 3 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x3>;
-
-			eeprom at 56 {
-				compatible = "at24,24c512";
-				reg = <0x56>;
-			};
-
-			eeprom at 57 {
-				compatible = "at24,24c512";
-				reg = <0x57>;
-			};
-
-			adt7461a at 4c {
-				compatible = "adt7461a";
-				reg = <0x4c>;
-			};
-		};
-	};
-};
-
-&ifc {
-	#address-cells = <2>;
-	#size-cells = <1>;
-	/* NOR, NAND Flashes and FPGA on board */
-	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
-		  0x2 0x0 0x0 0x7e800000 0x00010000
-		  0x3 0x0 0x0 0x7fb00000 0x00000100>;
-	status = "okay";
-
-	nor at 0,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "cfi-flash";
-		reg = <0x0 0x0 0x8000000>;
-		bank-width = <2>;
-		device-width = <1>;
-	};
-
-	nand at 2,0 {
-		compatible = "fsl,ifc-nand";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0x1 0x0 0x10000>;
-	};
-
-	fpga: board-control at 3,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		reg = <0x3 0x0 0x0000100>;
-		bank-width = <1>;
-		device-width = <1>;
-		ranges = <0 3 0 0x100>;
-	};
-};
-
-&duart0 {
-	status = "okay";
-};
-
-&duart1 {
-	status = "okay";
-};
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi
new file mode 100644
index 0000000..6fa16b8
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi
@@ -0,0 +1,123 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ *
+ * Copyright (C) 2015, Freescale Semiconductor
+ *
+ * Mingkai Hu <Mingkai.hu at freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/include/ "fsl-ls1043a.dtsi"
+
+/ {
+	model = "LS1043A QDS Board";
+};
+
+&i2c0 {
+	status = "okay";
+	pca9547 at 77 {
+		compatible = "philips,pca9547";
+		reg = <0x77>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c at 0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0>;
+
+			rtc at 68 {
+				compatible = "dallas,ds3232";
+				reg = <0x68>;
+				/* IRQ10_B */
+				interrupts = <0 150 0x4>;
+			};
+		};
+
+		i2c at 2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x2>;
+
+			ina220 at 40 {
+				compatible = "ti,ina220";
+				reg = <0x40>;
+				shunt-resistor = <1000>;
+			};
+
+			ina220 at 41 {
+				compatible = "ti,ina220";
+				reg = <0x41>;
+				shunt-resistor = <1000>;
+			};
+		};
+
+		i2c at 3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3>;
+
+			eeprom at 56 {
+				compatible = "at24,24c512";
+				reg = <0x56>;
+			};
+
+			eeprom at 57 {
+				compatible = "at24,24c512";
+				reg = <0x57>;
+			};
+
+			adt7461a at 4c {
+				compatible = "adt7461a";
+				reg = <0x4c>;
+			};
+		};
+	};
+};
+
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	/* NOR, NAND Flashes and FPGA on board */
+	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
+		  0x2 0x0 0x0 0x7e800000 0x00010000
+		  0x3 0x0 0x0 0x7fb00000 0x00000100>;
+	status = "okay";
+
+	nor at 0,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+	};
+
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x1 0x0 0x10000>;
+	};
+
+	fpga: board-control at 3,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		reg = <0x3 0x0 0x0000100>;
+		bank-width = <1>;
+		device-width = <1>;
+		ranges = <0 3 0 0x100>;
+	};
+};
+
+&duart0 {
+	status = "okay";
+};
+
+&duart1 {
+	status = "okay";
+};
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 60fb0ad..c294e82 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -2,5 +2,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SYS_NS16550=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds"
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
 CONFIG_OF_CONTROL=y
-- 
2.1.0.27.g96db324



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