[U-Boot] [PATCH v2 24/37] rockchip: Tidy up the register-access macros
Simon Glass
sjg at chromium.org
Fri Jan 22 03:45:12 CET 2016
These work reasonable well, but there are a few errors:
- Brackets should be used to avoid unexpected side-effects
- When setting bits, the corresponding upper 16 bits should be set also
Signed-off-by: Simon Glass <sjg at chromium.org>
---
Changes in v2: None
arch/arm/include/asm/arch-rockchip/hardware.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/hardware.h b/arch/arm/include/asm/arch-rockchip/hardware.h
index d5af5b8..08a66ef 100644
--- a/arch/arm/include/asm/arch-rockchip/hardware.h
+++ b/arch/arm/include/asm/arch-rockchip/hardware.h
@@ -7,14 +7,15 @@
#ifndef _ASM_ARCH_HARDWARE_H
#define _ASM_ARCH_HARDWARE_H
-#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set)
+#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set))
#define RK_SETBITS(set) RK_CLRSETBITS(0, set)
#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0)
#define TIMER7_BASE 0xff810020
-#define rk_clrsetreg(addr, clr, set) writel((clr) << 16 | (set), addr)
+#define rk_clrsetreg(addr, clr, set) \
+ writel(((clr) | (set)) << 16 | (set), addr)
#define rk_clrreg(addr, clr) writel((clr) << 16, addr)
-#define rk_setreg(addr, set) writel(set, addr)
+#define rk_setreg(addr, set) writel((set) << 16 | (set), addr)
#endif
--
2.7.0.rc3.207.g0ac5344
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