[U-Boot] [PATCH v9 49/49] rockchip: jerry: Enable the Chrome OS EC
Simon Glass
sjg at chromium.org
Fri Jan 22 03:44:13 CET 2016
Turn on the EC and enable the keyboard.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
Changes in v9:
- Rebase to upstream/master
Changes in v2: None
arch/arm/dts/rk3288-veyron-chromebook.dtsi | 4 ++++
configs/chromebook_jerry_defconfig | 8 ++++++++
include/configs/chromebook_jerry.h | 7 +++++++
include/configs/firefly-rk3288.h | 2 ++
include/configs/rk3288_common.h | 7 +++++++
5 files changed, 28 insertions(+)
diff --git a/arch/arm/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/dts/rk3288-veyron-chromebook.dtsi
index 6d619c9..bbbc2f4 100644
--- a/arch/arm/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/dts/rk3288-veyron-chromebook.dtsi
@@ -91,12 +91,16 @@
&spi0 {
status = "okay";
+ spi-activate-delay = <100>;
+ spi-max-frequency = <3000000>;
+ spi-deactivate-delay = <200>;
cros_ec: ec at 0 {
compatible = "google,cros-ec-spi";
spi-max-frequency = <3000000>;
interrupt-parent = <&gpio7>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ec_int>;
reg = <0>;
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index ceec6f5..b2672b8 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_CHROMEBOOK_JERRY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DM_KEYBOARD=y
CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
@@ -21,7 +22,13 @@ CONFIG_SPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_MUX=y
+CONFIG_CROS_EC_KEYB=y
+CONFIG_CMD_CROS_EC=y
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_SPI=y
CONFIG_PWRSEQ=y
CONFIG_RESET=y
CONFIG_DM_MMC=y
@@ -31,6 +38,7 @@ CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_PINCTRL=y
CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK808=y
CONFIG_DM_REGULATOR=y
CONFIG_REGULATOR_RK808=y
diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h
index 78c06af..6e32f2c 100644
--- a/include/configs/chromebook_jerry.h
+++ b/include/configs/chromebook_jerry.h
@@ -7,6 +7,11 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdin=serial,cros-ec-keyb\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0"
+
#include <configs/rk3288_common.h>
#define CONFIG_ENV_IS_NOWHERE
@@ -17,4 +22,6 @@
#undef CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_KEYBOARD
+
#endif
diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index 4c5c4dd..8ac6521 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -7,6 +7,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define ROCKCHIP_DEVICE_SETTINGS
+
#include <configs/rk3288_common.h>
#define CONFIG_SPL_MMC_SUPPORT
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index f47573b..ebddfb0 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -42,6 +42,12 @@
#define CONFIG_ROCKCHIP_COMMON
#define CONFIG_SPL_ROCKCHIP_COMMON
+#define CONFIG_SILENT_CONSOLE
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_SYS_CONSOLE_IS_IN_ENV
+# define CONFIG_CONSOLE_MUX
+#endif
+
/* MMC/SD IP block */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
@@ -110,6 +116,7 @@
"fdt_high=0x1fffffff\0" \
"initrd_high=0x1fffffff\0" \
ENV_MEM_LAYOUT_SETTINGS \
+ ROCKCHIP_DEVICE_SETTINGS \
BOOTENV
#endif
--
2.7.0.rc3.207.g0ac5344
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