[U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
Qianyu Gong
qianyu.gong at nxp.com
Fri Jan 22 05:57:54 CET 2016
Hi Scott,
> -----Original Message-----
> From: Scott Wood [mailto:oss at buserror.net]
> Sent: Friday, January 22, 2016 6:50 AM
> To: Qianyu Gong <qianyu.gong at nxp.com>; u-boot at lists.denx.de
> Cc: B48286 at freescale.com; Wenbin.Song at freescale.com; Mingkai Hu
> <mingkai.hu at nxp.com>
> Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot support
>
> On Thu, 2016-01-14 at 04:26 +0000, Qianyu Gong wrote:
> > > -----Original Message-----
> > > From: Scott Wood [mailto:oss at buserror.net]
> > > Sent: Thursday, January 14, 2016 8:21 AM
> > > To: Qianyu Gong <qianyu.gong at nxp.com>; u-boot at lists.denx.de
> > > Cc: B07421 at freescale.com; B48286 at freescale.com;
> > > Wenbin.Song at freescale.com; Mingkai Hu <mingkai.hu at nxp.com>
> > > Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI boot
> > > support
> > >
> > > On Tue, 2016-01-12 at 03:14 +0000, Qianyu Gong wrote:
> > > > > -----Original Message-----
> > > > > From: Scott Wood [mailto:oss at buserror.net]
> > > > > Sent: Tuesday, January 12, 2016 1:47 AM
> > > > > To: Qianyu Gong <qianyu.gong at nxp.com>; u-boot at lists.denx.de
> > > > > Cc: B07421 at freescale.com; B48286 at freescale.com;
> > > > > Wenbin.Song at freescale.com; Mingkai Hu <mingkai.hu at nxp.com>
> > > > > Subject: Re: [U-Boot] [Patch V3 3/3] armv8/ls1043aqds: add QSPI
> > > > > boot support
> > > > >
> > > > > On Mon, 2016-01-11 at 10:17 +0800, Gong Qianyu wrote:
> > > > > > diff --git a/board/freescale/ls1043aqds/ls1043aqds.c
> > > > > > b/board/freescale/ls1043aqds/ls1043aqds.c
> > > > > > index d6696ca..770b79f 100644
> > > > > > --- a/board/freescale/ls1043aqds/ls1043aqds.c
> > > > > > +++ b/board/freescale/ls1043aqds/ls1043aqds.c
> > > > > > @@ -43,15 +43,19 @@ enum {
> > > > > >
> > > > > > int checkboard(void)
> > > > > > {
> > > > > > +#ifndef CONFIG_QSPI_BOOT
> > > > > > char buf[64];
> > > > > > #ifndef CONFIG_SD_BOOT
> > > > > > u8 sw;
> > > > > > #endif
> > > > > > +#endif
> > > > > >
> > > > > > puts("Board: LS1043AQDS, boot from ");
> > > > > >
> > > > > > #ifdef CONFIG_SD_BOOT
> > > > > > puts("SD\n");
> > > > > > +#elif defined(CONFIG_QSPI_BOOT)
> > > > > > + puts("QSPI\n");
> > > > > > #else
> > > > > > sw = QIXIS_READ(brdcfg[0]);
> > > > > > sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@
> > > > > > -68,12
> > > > > +72,15
> > > > > > @@ int checkboard(void)
> > > > > > printf("invalid setting of SW%u\n",
> QIXIS_LBMAP_SWITCH);
> > > > > #endif
> > > > > >
> > > > > > +#ifndef CONFIG_QSPI_BOOT
> > > > > > + /* For QSPI boot, here I2C is not ready yet. */
> > > > > > printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n",
> > > > > > QIXIS_READ(id), QIXIS_READ(arch));
> > > > > >
> > > > > > printf("FPGA: v%d (%s), build %d\n",
> > > > > > (int)QIXIS_READ(scver), qixis_read_tag(buf),
> > > > > > (int)qixis_read_minor());
> > > > > > +#endif
> > > > >
> > > > > Why isn't i2c ready? How is DDR inited without it?
> > > > >
> > > > > -Scott
> > > >
> > > > Hi Scott,
> > > >
> > > > The calling sequence in U-Boot is :
> > > > checkboard() -> init_func_i2c() -> dram_init()
> > > >
> > > > So I2C is not ready in checkboard() but is ready for DDR initialization.
> > >
> > > Can you move the prints later in the boot sequence?
> > >
> > > In any case, the relevant variable is whether qixis uses i2c, not
> > > whether you're booting from qspi (even if they are correlated).
> > >
> > > -Scott
> >
> > Yes. Only with QSPI it needs I2C to access QIXIS.
> > But if defining CONFIG_DISPLAY_BOARDINFO_LATE, the print layout will
> > look really uncomfortable.. So we just comment out the FPGA prints for QSPI
> boot.
>
> Can this info be dumped from a command instead of just removed?
>
> -Scott
We could only dump the registers using ''qixis_reset dump''.
Another way is to just make QSPI boot print this info later.
The following is the boot log:
U-Boot 2016.01-00289-g946e8fe-dirty (Jan 22 2016 - 12:40:21 +0800)
SoC: unknown (0x87920010)
Clock Configuration:
CPU0(A53):1500 MHz CPU1(A53):1500 MHz CPU2(A53):1500 MHz
CPU3(A53):1500 MHz
Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz
Reset Configuration Word (RCW):
00000000: 0810000f 0c000000 00000000 00000000
00000010: 14550002 80004012 40025000 61002000
00000020: 00000000 00000000 00000000 00038800
00000030: 20124000 00001100 00000096 00000001
I2C: ready
DRAM: Initializing DDR....using SPD
Detected UDIMM 9ASF51272AZ-2G1A1
2 GiB (DDR4, 32-bit, CL=11, ECC on)
Waking secondary cores to start from ffd42000
All (4) cores are up.
Using SERDES1 Protocol: 5205 (0x1455)
MMC: FSL_SDHC: 0
SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
PCIe1: disabled
PCIe2: Root Complex no link, regs @ 0x3500000
PCIe3: Root Complex no link, regs @ 0x3600000
In: serial
Out: serial
Err: serial
Model: LS1043A QDS Board
Board: LS1043AQDS, boot from QSPI
Sys ID: 0x36, Sys Ver: 0x11
FPGA: v5 (LS1043QDS_2015_0427_1339), build 5
SATA link 0 timeout.
AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst
Found 0 device(s).
SCSI: Net: SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Fman1: Uploading microcode version 106.4.15
FM1 at DTSEC3, FM1 at DTSEC4, FM1 at TGEC1
Hit any key to stop autoboot: 0
=>
"Model: LS1043A QDS Board
Board: LS1043AQDS, boot from QSPI
Sys ID: 0x36, Sys Ver: 0x11
FPGA: v5 (LS1043QDS_2015_0427_1339), build 5"
So the four lines are printed later.
Regards,
Qianyu
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