[U-Boot] [PATCH 12/22] ppc: xilinx-ppc4xx-generic: Update xparameters.h

Ricardo Ribalda Delgado ricardo.ribalda at gmail.com
Tue Jan 26 11:24:15 CET 2016


-Remove UART address (It is now part of the dts).
-Include dummy ns16550 clock
-Fix address to last test

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda at gmail.com>
---
 board/xilinx/ppc405-generic/xparameters.h | 5 ++---
 board/xilinx/ppc440-generic/xparameters.h | 9 ++++-----
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/board/xilinx/ppc405-generic/xparameters.h b/board/xilinx/ppc405-generic/xparameters.h
index e61040785937..c3df9e51091f 100644
--- a/board/xilinx/ppc405-generic/xparameters.h
+++ b/board/xilinx/ppc405-generic/xparameters.h
@@ -14,12 +14,11 @@
 #define XPAR_IIC_EEPROM_BASEADDR	0x81600000
 #define XPAR_INTC_0_BASEADDR		0x81800000
 #define XPAR_SPI_0_BASEADDR             0x83400000
-#define XPAR_UARTLITE_0_BASEADDR	0x84000000
 #define XPAR_FLASH_MEM0_BASEADDR	0xFE000000
 #define XPAR_PLB_CLOCK_FREQ_HZ		100000000
 #define XPAR_CORE_CLOCK_FREQ_HZ		400000000
-#define XPAR_INTC_MAX_NUM_INTR_INPUTS	13
-#define XPAR_UARTLITE_0_BAUDRATE	9600
+#define XPAR_INTC_MAX_NUM_INTR_INPUTS	32
 #define XPAR_SPI_0_NUM_TRANSFER_BITS	8
+#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ	100000000
 
 #endif
diff --git a/board/xilinx/ppc440-generic/xparameters.h b/board/xilinx/ppc440-generic/xparameters.h
index 3c135ec42b37..9685560673ab 100644
--- a/board/xilinx/ppc440-generic/xparameters.h
+++ b/board/xilinx/ppc440-generic/xparameters.h
@@ -12,12 +12,11 @@
 
 #define XPAR_DDR2_SDRAM_MEM_BASEADDR	0x00000000
 #define XPAR_IIC_EEPROM_BASEADDR	0x81600000
-#define XPAR_INTC_0_BASEADDR		0x81800000
-#define XPAR_UARTLITE_0_BASEADDR	0x84000000
-#define XPAR_FLASH_MEM0_BASEADDR	0xFE000000
+#define XPAR_INTC_0_BASEADDR		0x87000000
+#define XPAR_FLASH_MEM0_BASEADDR	0xF0000000
 #define XPAR_PLB_CLOCK_FREQ_HZ		100000000
 #define XPAR_CORE_CLOCK_FREQ_HZ		400000000
-#define XPAR_INTC_MAX_NUM_INTR_INPUTS	13
-#define XPAR_UARTLITE_0_BAUDRATE	9600
+#define XPAR_INTC_MAX_NUM_INTR_INPUTS	32
+#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ	100000000
 
 #endif
-- 
2.7.0.rc3



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