[U-Boot] [PATCH v4 2/4] QE: add QE support on ls1043ardb

[Zhao Qiang]

Upload qe microcode on ls1043ardb

Signed-off-by: Zhao Qiang <qiang.zhao at nxp.com>
---
 board/freescale/ls1043ardb/ls1043ardb.c | 8 ++++++++
 drivers/qe/qe.c                         | 6 ++----
 include/configs/ls1043ardb.h            | 7 +++++++
 3 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index c8f723a..834fdff 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -21,6 +21,10 @@
 #include <environment.h>
 #include <fsl_sec.h>
 #include "cpld.h"
+#ifdef CONFIG_U_QE
+#include "../../../drivers/qe/qe.h"
+#endif
+
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -113,6 +117,10 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif
 
+#ifdef CONFIG_U_QE
+	u_qe_init();
+#endif
+
 	return 0;
 }
 
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 2a9e61b..8a432a8 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -192,8 +192,7 @@ void qe_init(uint qe_base)
 #ifdef CONFIG_U_QE
 void u_qe_init(void)
 {
-	uint qe_base = CONFIG_SYS_IMMR + 0x01400000; /* QE immr base */
-	qe_immr = (qe_map_t *)qe_base;
+	qe_immr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET);
 
 	u_qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR);
 	out_be32(&qe_immr->iram.iready, QE_IRAM_READY);
@@ -204,9 +203,8 @@ void u_qe_init(void)
 void u_qe_resume(void)
 {
 	qe_map_t *qe_immrr;
-	uint qe_base = CONFIG_SYS_IMMR + QE_IMMR_OFFSET; /* QE immr base */
-	qe_immrr = (qe_map_t *)qe_base;
 
+	qe_immrr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET);
 	u_qe_firmware_resume((const void *)CONFIG_SYS_QE_FW_ADDR, qe_immrr);
 	out_be32(&qe_immrr->iram.iready, QE_IRAM_READY);
 }
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 585114f..6494507 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -278,6 +278,13 @@
 #define CONFIG_ETHPRIME			"FM1 at DTSEC3"
 #endif
 
+/* QE */
+#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
+	!defined(CONFIG_QSPI_BOOT)
+#define CONFIG_U_QE
+#endif
+#define CONFIG_SYS_QE_FW_ADDR     0x60600000
+
 /* USB */
 #define CONFIG_HAS_FSL_XHCI_USB
 #ifdef CONFIG_HAS_FSL_XHCI_USB
-- 
2.1.0.27.g96db324