[U-Boot] [PATCH v2] armv7: add cacheline sizes where missing
Albert ARIBAUD
albert.u.boot at aribaud.net
Fri Jan 29 07:39:40 CET 2016
On Wed, 27 Jan 2016 08:46:11 +0100, Albert ARIBAUD
<albert.u.boot at aribaud.net> wrote:
> Some armv7 targets are missing a cache line size declaration.
> In preparation for "arm: cache: Implement cache range check for v7"
> patch, add these declarations with the appropriate value for
> the target's SoC or CPU.
>
> Signed-off-by: Albert ARIBAUD <albert.u.boot at aribaud.net>
> ---
>
> Changes in v2:
> - fix include/configs/at91-sama5_common.h (Cortex-A5: 32 bytes)
Applied to u-boot-arm/master, adding Tom's Reviewed-by from V1 since
there was no change to TI boards in V2.
Amicalement,
--
Albert.
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