[U-Boot] [PATCH 1/2] drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl

[York Sun]

On 05/31/2016 10:12 PM, Shengzhou Liu wrote:
>> -----Original Message-----
>> From: York Sun [mailto:york.sun at nxp.com]
>> Sent: Wednesday, June 01, 2016 12:04 AM
>> To: Shengzhou Liu <shengzhou.liu at nxp.com>; u-boot at lists.denx.de
>> Shengzhou,
>>
>> If you have to use an odd number for clk_adj, we can go ahead to merge
>> these patches. In my experience, clk_adj is very forgivable. If you have only
>> one value works, there is probably something wrong.
>>
>> York
>>
> York, 
> The odd clk_adj = 9  is the optimal with timing centralization, maybe it work  if set it to 8, but not the optimal.
> Theoretically we should have the actual value instead of dividing 2 to avoid confusion for customers.
> Shengzhou
> 

OK. Thanks for the explanation.

York