[U-Boot] [PATCH v4 3/9] ARMv7: PSCI: update the place of saving target PC

macro.wave.z at gmail.com macro.wave.z at gmail.com
Thu Jun 2 10:07:10 CEST 2016


From: Hongbo Zhang <hongbo.zhang at nxp.com>

The legacy code reserves one word in each stack for saving target PC, but it
isn't used, the target PC is still saved to where the stack top pointer points.
This patch relocates the place for saving target PC to the lowest address of
each stack, convinience is that we can save more contents if needed ilater next
to saved target PC without re-adjust the stack top pointer.

Signed-off-by: Hongbo Zhang <hongbo.zhang at nxp.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang at nxp.com>
---
 arch/arm/cpu/armv7/ls102xa/psci.S     | 1 +
 arch/arm/cpu/armv7/mx7/psci.S         | 1 +
 arch/arm/cpu/armv7/psci.S             | 3 ++-
 arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 3 ++-
 arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 3 ++-
 arch/arm/include/asm/psci.h           | 1 +
 arch/arm/mach-tegra/psci.S            | 3 ++-
 7 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S b/arch/arm/cpu/armv7/ls102xa/psci.S
index cf5cd48..988a1d2 100644
--- a/arch/arm/cpu/armv7/ls102xa/psci.S
+++ b/arch/arm/cpu/armv7/ls102xa/psci.S
@@ -37,6 +37,7 @@ psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
 	str	r2, [r0]
 	dsb
 
diff --git a/arch/arm/cpu/armv7/mx7/psci.S b/arch/arm/cpu/armv7/mx7/psci.S
index 34c6ab3..02ca076 100644
--- a/arch/arm/cpu/armv7/mx7/psci.S
+++ b/arch/arm/cpu/armv7/mx7/psci.S
@@ -31,6 +31,7 @@ psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
 	str	r2, [r0]
 	dsb
 
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 91a1dd1..14ffc85 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -294,7 +294,8 @@ ENTRY(psci_cpu_entry)
 
 	bl	psci_get_cpu_id			@ CPU ID => r0
 	bl	psci_get_cpu_stack_top		@ stack top => r0
-	ldr	r0, [r0]			@ target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	ldr	r0, [r0]			@ get target PC
 	b	_do_nonsec_entry
 ENDPROC(psci_cpu_entry)
 
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
index 90b5bfd..930aa7a 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
@@ -136,7 +136,8 @@ psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top	@ get stack top of target CPU
-	str	r2, [r0]		@ store target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	str	r2, [r0]		@ store target PC
 	dsb
 
 	movw	r0, #(SUN6I_CPUCFG_BASE & 0xffff)
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
index e15d587..7fbeac1 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
@@ -125,7 +125,8 @@ psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top	@ get stack top of target CPU
-	str	r2, [r0]		@ store target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	str	r2, [r0]		@ store target PC
 	dsb
 
 	movw	r0, #(SUN7I_CPUCFG_BASE & 0xffff)
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 76c3c92..cb08544 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -65,6 +65,7 @@
 
 /* size of percpu stack, 1kB */
 #define PSCI_PERCPU_STACK_SIZE		0x400
+#define PSCI_TARGET_PC_OFFSET		(PSCI_PERCPU_STACK_SIZE - 4)
 
 #ifndef __ASSEMBLY__
 int psci_update_dt(void *fdt);
diff --git a/arch/arm/mach-tegra/psci.S b/arch/arm/mach-tegra/psci.S
index b836da1..a335276 100644
--- a/arch/arm/mach-tegra/psci.S
+++ b/arch/arm/mach-tegra/psci.S
@@ -92,7 +92,8 @@ ENTRY(psci_cpu_on)
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top	@ get stack top of target CPU
-	str	r2, [r0]		@ store target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	str	r2, [r0]		@ store target PC
 	dsb
 
 	ldr	r6, =TEGRA_RESET_EXCEPTION_VECTOR
-- 
2.1.4



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