[U-Boot] [PATCH v4 07/10] armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot
Yuan Yao
yao.yuan at freescale.com
Tue Jun 7 10:15:26 CEST 2016
From: Yuan Yao <yao.yuan at nxp.com>
In order to access QSPI flash we must asserted ISO allowing
the DUT to access the full IFC domain.
But deasserted the unused ISO will allowing maximum performance.
Signed-off-by: Yuan Yao <yao.yuan at nxp.com>
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
board/freescale/ls2080aqds/ls2080aqds.c | 9 +++++++++
include/configs/ls2080aqds.h | 6 ++++++
3 files changed, 17 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index bfff2ec..7c47cc8 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -128,6 +128,8 @@
#define DCFG_PORSR1_RCW_SRC_NOR 0x12f00000
#define DCFG_RCWSR13 0x130
#define DCFG_RCWSR13_DSPI (0 << 8)
+#define DCFG_RCWSR15 0x138
+#define DCFG_RCWSR15_IFCGRPABASE_QSPI 0x3
#define DCFG_DCSR_BASE 0X700100000ULL
#define DCFG_DCSR_PORCR1 0x000
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index d7acb48..80a6e93 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -208,6 +208,15 @@ int board_init(void)
else
config_board_mux(MUX_TYPE_SDHC);
+#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
+ val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
+
+ if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
+ QIXIS_WRITE(brdcfg[9],
+ (QIXIS_READ(brdcfg[9]) & 0xf8) |
+ FSL_QIXIS_BRDCFG9_QSPI);
+#endif
+
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index c0c2a97..bebbc88 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -304,6 +304,12 @@ unsigned long get_board_ddr_clk(void);
#define FSL_QSPI_FLASH_SIZE (1 << 26) /* 64MB */
#define FSL_QSPI_FLASH_NUM 4
#endif
+/*
+ * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
+ * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
+ * If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1
+ */
+#define FSL_QIXIS_BRDCFG9_QSPI 0x1
#endif
/*
--
2.1.0.27.g96db324
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