[U-Boot] [RFC] x86: baytrail: azalia DT configuration mock-up
George McCollister
george.mccollister at gmail.com
Thu Jun 9 22:57:12 CEST 2016
I'm looking for feedback on this mock-up of fsp,azalia-config DT
before I proceed to writing code. I included everything in fsp for
context.
fsp {
compatible = "intel,baytrail-fsp";
fsp,mrc-init-tseg-size = <0>;
fsp,mrc-init-mmio-size = <0x800>;
fsp,mrc-init-spd-addr1 = <0xa0>;
fsp,mrc-init-spd-addr2 = <0xa2>;
fsp,emmc-boot-mode = <2>;
fsp,enable-sdio;
fsp,enable-sdcard;
fsp,enable-hsuart1;
fsp,enable-spi;
fsp,enable-sata;
fsp,sata-mode = <1>;
fsp,enable-azalia;
fsp,azalia-config {
compatible = "intel,baytrail-fsp-azalia-config";
fsp,pme-enable = <1>;
fsp,docking-supported = <1>;
fsp,docking-attached = <0>;
fsp,hdmi-codec-enable = <1>;
fsp,azalia-v-ci-enable = <1>;
fsp,rsvdbits = <0>;
fsp,reset-wait-timer-us = <300>;
alc262 {
compatible = "fsp,azalia-verb-table";
fsp,vendor-device-id = <0x10ec0262>;
fsp,sub-system-id = <0>;
fsp,revision-id = <0xff>;
fsp,front-panel-support = <1>;
fsp,number-of-rear-jacks = <11>;
fsp,number-of-front-jacks = <2>;
fsp,verb-table-data = <
/* Pin Complex (NID 0x11) */
0x01171cf0
0x01171d11
0x01171e11
0x01171f41
/* Pin Complex (NID 0x12) */
0x01271cf0
0x01271d11
0x01271e11
0x01271f41
/* Pin Complex (NID 0x14) */
0x01471c10
0x01471d40
0x01471e01
0x01471f01
/* Pin Complex (NID 0x15) */
0x01571cf0
0x01571d11
0x01571e11
0x01571f41
/* Pin Complex (NID 0x16) */
0x01671cf0
0x01671d11
0x01671e11
0x01671f41
/* Pin Complex (NID 0x18) */
0x01871c20
0x01871d98
0x01871ea1
0x01871f01
/* Pin Complex (NID 0x19) */
0x01971c21
0x01971d98
0x01971ea1
0x01971f02
/* Pin Complex (NID 0x1A) */
0x01a71c2f
0x01a71d30
0x01a71e81
0x01a71f01
/* Pin Complex */
0x01b71c1f
0x01b71d40
0x01b71e21
0x01b71f02
/* Pin Complex */
0x01c71cf0
0x01c71d11
0x01c71e11
0x01c71f41
/* Pin Complex */
0x01d71c01
0x01d71dc6
0x01d71e14
0x01d71f40
/* Pin Complex */
0x01e71cf0
0x01e71d11
0x01e71e11
0x01e71f41
/* Pin Complex */
0x01f71cf0
0x01f71d11
0x01f71e11
0x01f71f41
>;
};
};
fsp,lpss-sio-enable-pci-mode;
fsp,enable-dma0;
fsp,enable-dma1;
fsp,enable-i2c0;
fsp,enable-i2c1;
fsp,enable-i2c2;
fsp,enable-i2c3;
fsp,enable-i2c4;
fsp,enable-i2c5;
fsp,enable-i2c6;
fsp,enable-pwm0;
fsp,enable-pwm1;
fsp,igd-dvmt50-pre-alloc = <2>;
fsp,aperture-size = <2>;
fsp,gtt-size = <2>;
fsp,serial-debug-port-address = <0x3f8>;
fsp,serial-debug-port-type = <1>;
fsp,scc-enable-pci-mode;
fsp,os-selection = <4>;
fsp,emmc45-ddr50-enabled;
fsp,emmc45-retune-timer-value = <8>;
fsp,enable-igd;
fsp,enable-memory-down;
fsp,memory-down-params {
compatible = "intel,baytrail-fsp-mdp";
fsp,dram-speed = <1>;
fsp,dram-type = <1>;
fsp,dimm-0-enable;
fsp,dimm-width = <1>;
fsp,dimm-density = <2>;
fsp,dimm-bus-width = <3>;
fsp,dimm-sides = <0>;
fsp,dimm-tcl = <0xb>;
fsp,dimm-trpt-rcd = <0xb>;
fsp,dimm-twr = <0xc>;
fsp,dimm-twtr = <6>;
fsp,dimm-trrd = <6>;
fsp,dimm-trtp = <6>;
fsp,dimm-tfaw = <0x14>;
};
};
Thanks,
George McCollister
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