[U-Boot] [PATCH v3] mmc: atmel_sdhci: Convert to the driver model support

Simon Glass sjg at chromium.org
Fri Jun 10 02:35:31 CEST 2016


Hi Wenyou,

On 7 June 2016 at 01:28, Wenyou Yang <wenyou.yang at atmel.com> wrote:
> Convert the driver to the driver model while retaining the existing
> legacy code. This allows the driver to support boards that have
> converted to driver model as well as those that have not.
>
> Signed-off-by: Wenyou Yang <wenyou.yang at atmel.com>
> ---
>
> Changes in v3:
>  - Remove the redundant log print.
>
> Changes in v2:
>  - Add clock support, include enabling peripheral clock and
>    generated clock.
>  - Retain the existing legacy code to support boards which have not
>    converted to driver model.
>
>  drivers/mmc/Kconfig       | 10 ++++++
>  drivers/mmc/atmel_sdhci.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 102 insertions(+)
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index dc8532f..7f6b2e1 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -16,6 +16,16 @@ config DM_MMC
>           appear as block devices in U-Boot and can support filesystems such
>           as EXT4 and FAT.
>
> +config ATMEL_SDHCI
> +       bool "Atmel SDHCI controller support"
> +       depends on DM_MMC && ARCH_AT91
> +       help
> +         This enables support for the Atmel SDHCI controller, which supports
> +         the embedded MultiMedia Card (e.MMC) Specification V4.51, the SD
> +         Memory Card Specification V3.0, and the SDIO V3.0 specification.
> +         It is compliant with the SD Host Controller Standard V3.0
> +         specification.
> +
>  config ROCKCHIP_DWMMC
>         bool "Rockchip SD/MMC controller support"
>         depends on DM_MMC && OF_CONTROL
> diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
> index 24b68b6..dc74704 100644
> --- a/drivers/mmc/atmel_sdhci.c
> +++ b/drivers/mmc/atmel_sdhci.c
> @@ -6,12 +6,16 @@
>   */
>
>  #include <common.h>
> +#include <clk.h>
> +#include <dm.h>
>  #include <malloc.h>
>  #include <sdhci.h>
>  #include <asm/arch/clk.h>
>
>  #define ATMEL_SDHC_MIN_FREQ    400000
>
> +#ifndef CONFIG_DM_MMC
> +
>  int atmel_sdhci_init(void *regbase, u32 id)
>  {
>         struct sdhci_host *host;
> @@ -38,3 +42,91 @@ int atmel_sdhci_init(void *regbase, u32 id)
>
>         return 0;
>  }
> +
> +#else
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static int atmel_sdhci_probe(struct udevice *dev)
> +{
> +       struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
> +       struct sdhci_host *host = dev_get_priv(dev);
> +       u32 max_clk, min_clk = ATMEL_SDHC_MIN_FREQ;
> +       u32 caps0, caps1;
> +       u32 clk_base, clk_mul;
> +       u32 gck_rate;
> +       struct udevice *clkdev;
> +       int periph, ret;
> +
> +       ret = clk_get_by_index(dev, 0, &clkdev);
> +       if (ret)
> +               return ret;
> +
> +       periph = fdtdec_get_uint(gd->fdt_blob, clkdev->of_offset, "reg", -1);
> +       if (periph < 0)
> +               return -EINVAL;
> +
> +       clkdev = dev_get_parent(clkdev);
> +       if (!clkdev)
> +               return -ENODEV;

This cannot happen, there is always a parent. Even if your device tree
has this as a root node, there is still the root device.

> +
> +       ret = clk_enable(clkdev, periph);
> +       if (ret)
> +               return ret;
> +
> +       host->name = (char *)dev->name;
> +       host->ioaddr = (void *)dev_get_addr(dev);
> +
> +       host->quirks = 0;
> +       host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
> +
> +       host->bus_width = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> +                                        "bus-width", 4);
> +
> +       caps0 = readl(host->ioaddr + SDHCI_CAPABILITIES);
> +       caps1 = readl(host->ioaddr + SDHCI_CAPABILITIES_1);
> +       clk_base = (caps0 & SDHCI_CLOCK_V3_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
> +       clk_mul = (caps1 & SDHCI_CLOCK_MUL_MASK) >> SDHCI_CLOCK_MUL_SHIFT;
> +       gck_rate = clk_base * 1000000 * (clk_mul + 1);
> +
> +       ret = clk_get_by_index(dev, 1, &clkdev);
> +       if (ret)
> +               return ret;
> +
> +       periph = fdtdec_get_uint(gd->fdt_blob, clkdev->of_offset, "reg", -1);
> +       if (periph < 0)
> +               return -EINVAL;
> +
> +       clkdev = dev_get_parent(clkdev);
> +       if (!clkdev)
> +               return -ENODEV;

-EINVAL

> +
> +       ret = clk_set_periph_rate(clkdev, periph, gck_rate);
> +       if (ret)
> +               return -ENODEV;

return ret

> +
> +       max_clk = clk_get_periph_rate(clkdev, periph);
> +       if (!max_clk)
> +               return -ENODEV;

-EINVAL

> +
> +       add_sdhci(host, max_clk, min_clk);
> +
> +       upriv->mmc = host->mmc;
> +
> +       return 0;
> +}
> +
> +static const struct udevice_id atmel_sdhci_ids[] = {
> +       { .compatible = "atmel,sama5d2-sdhci" },
> +       { }
> +};
> +
> +U_BOOT_DRIVER(atmel_sdhci_drv) = {
> +       .name           = "atmel_sdhci",
> +       .id             = UCLASS_MMC,
> +       .of_match       = atmel_sdhci_ids,
> +       .probe          = atmel_sdhci_probe,
> +       .priv_auto_alloc_size = sizeof(struct sdhci_host),
> +};
> +
> +#endif
> --
> 2.7.4
>

Regards,
Simon


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