[U-Boot] [PATCH 4/8] x86: baytrail: Configure card detect pin of the SD controller

Simon Glass sjg at chromium.org
Fri Jun 10 02:35:50 CEST 2016


On 8 June 2016 at 06:07, Bin Meng <bmeng.cn at gmail.com> wrote:
> As of today, the latest version FSP (gold4) for BayTrail misses the
> PAD configuration of the SD controller's Card Detect signal. The
> default PAD value for the CD pin sets the pin to work in GPIO mode,
> which causes card detect status cannot be reflected by the Present
> State register in the SD controller (bit 16 & bit 18 are always zero).
>
> Add a configuration for this pin in the pinctrl node.
>
> Note I've checked the PAD configuration for all the pins in all the
> 3 controllers (eMMC/SDIO/SD). Only this SDMMC3_CD_B pin does not get
> initialized to correct mode by FSP. With fsp,emmc-boot-mode set to
> 2 (eMMC 4.1), eMMC pins are initialized to func 1, but if we set
> fsp,emmc-boot-mode to 1 (auto), those pins are initialized to func 3
> which is correct according to datasheet.
>
> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
> ---
>
>  arch/x86/dts/bayleybay.dts               | 15 +++++++++++++++
>  arch/x86/dts/conga-qeval20-qa3-e3845.dts | 15 +++++++++++++++
>  arch/x86/dts/minnowmax.dts               | 15 +++++++++++++++
>  3 files changed, 45 insertions(+)

Reviewed-by: Simon Glass <sjg at chromium.org>


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