[U-Boot] [PATCH v5] armv8/ls2080a: configure PMU's PCTBENR to enable WDT

York Sun york.sun at nxp.com
Sat Jun 11 00:22:50 CEST 2016


On 06/07/2016 07:42 PM, Yunhui Cui wrote:
> From: Yunhui Cui <yunhui.cui at nxp.com>
> 
> The SP805-WDT module on LS2080A and LS2085A, requires configuration
> of PMU's PCTBENR register to enable watchdog counter decrement and
> reset signal generation. In order not to affect the sp805wdt driver
> frame, we enable the watchdog clk in advance.
> 
> Signed-off-by: Yunhui Cui <yunhui.cui at nxp.com>
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c                | 12 ++++++++++++
>  arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h |  1 +
>  2 files changed, 13 insertions(+)

Applied to fsl-qoriq master. Awaiting upstream. Thanks.

York




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