[U-Boot] [PATCH] ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20

[Masahiro Yamada]

The DRAM PHY on PH1-LD20 is able to calibrate PHY parameters
periodically.  This improves PHY adjustment against the voltage and
temperature deviation.  Instead, it requires 64 byte scratch memory
in each DRAM channel for the dynamic training.  The memory regions
must be reserved in DT before jumping to the kernel.

The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions dynamically by U-Boot
instead of statically embedding it in the DT in Linux.  Anyway,
a boot-loader should know much more about memory initialization
than the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---

 arch/arm/Kconfig                   |  1 +
 arch/arm/mach-uniphier/Kconfig     |  1 +
 arch/arm/mach-uniphier/dram_init.c | 40 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 42 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e75c4c0..5aaae96 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -801,6 +801,7 @@ config ARCH_UNIPHIER
 	select SPL
 	select OF_CONTROL
 	select SPL_OF_CONTROL
+	select OF_LIBFDT
 	select DM
 	select SPL_DM
 	select DM_GPIO
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index ae763ad..b2374db 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -32,6 +32,7 @@ config ARCH_UNIPHIER_LD20
 	bool "UniPhier PH1-LD20 SoC"
 	select ARM64
 	select SPL_SEPARATE_BSS
+	select OF_BOARD_SETUP
 
 endchoice
 
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index ef0e2e8..06300de 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -9,6 +9,9 @@
 #include <fdtdec.h>
 #include <linux/err.h>
 
+#include "init.h"
+#include "soc-info.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static const void *get_memory_reg_prop(const void *fdt, int *lenp)
@@ -81,3 +84,40 @@ void dram_init_banksize(void)
 		      (unsigned long)gd->bd->bi_dram[i].size);
 	}
 }
+
+#ifdef CONFIG_OF_BOARD_SETUP
+/*
+ * The DRAM PHY requires 64 byte scratch area in each DRAM channel
+ * for its dynamic PHY training feature.
+ */
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+	const struct uniphier_board_data *param;
+	unsigned long rsv_addr;
+	const unsigned long rsv_size = 64;
+	int ch, ret;
+
+	if (uniphier_get_soc_type() != SOC_UNIPHIER_LD20)
+		return 0;
+
+	param = uniphier_get_board_param();
+	if (!param) {
+		printf("failed to get board parameter\n");
+		return -ENOENT;
+	}
+
+	for (ch = 0; ch < param->dram_nr_ch; ch++) {
+		rsv_addr = param->dram_ch[ch].base + param->dram_ch[ch].size;
+		rsv_addr -= rsv_size;
+
+		ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
+		if (ret)
+			return ret;
+
+		printf("   Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
+		       rsv_addr, rsv_size);
+	}
+
+	return 0;
+}
+#endif
-- 
1.9.1