[U-Boot] [PATCH10/23] DTS: STM32f429: add gpio-banks

Benjamin Tietz uboot at dresden.micronet24.de
Sat Jun 18 14:56:16 CEST 2016


From: Benjamin Tietz <benjamin at micronet24.de>


---
 arch/arm/dts/stm32f429.dtsi |   92 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 92 insertions(+)
-------------- next part --------------
From: Benjamin Tietz <benjamin at micronet24.de>


---
 arch/arm/dts/stm32f429.dtsi |   92 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 92 insertions(+)

diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi
index 5e1e234..0d032fb 100644
--- a/arch/arm/dts/stm32f429.dtsi
+++ b/arch/arm/dts/stm32f429.dtsi
@@ -57,6 +57,98 @@
 	};
 
 	soc {
+		gpioA:	gpio at 40020000 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40020000 0x400>;
+			clocks = <&rcc 0 0>;
+		};
+
+		gpioB:	gpio at 40020400 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40020400 0x400>;
+			clocks = <&rcc 0 1>;
+		};
+
+		gpioC:	gpio at 40020800 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40020800 0x400>;
+			clocks = <&rcc 0 2>;
+		};
+
+		gpioD:	gpio at 40020c00 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40020c00 0x400>;
+			clocks = <&rcc 0 3>;
+		};
+
+		gpioE:	gpio at 40021000 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40021000 0x400>;
+			clocks = <&rcc 0 4>;
+		};
+
+		gpioF:	gpio at 40021400 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40021400 0x400>;
+			clocks = <&rcc 0 5>;
+		};
+
+		gpioG:	gpio at 40021800 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40021800 0x400>;
+			clocks = <&rcc 0 6>;
+		};
+
+		gpioH:	gpio at 40021c00 {
+			#gpio-cells = <1>;
+			gpio-count = <2>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40021c00 0x400>;
+			clocks = <&rcc 0 7>;
+		};
+
+		gpioI:	gpio at 40022000 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40022000 0x400>;
+			clocks = <&rcc 0 8>;
+			status = "disabled";
+		};
+
+		gpioJ:	gpio at 40022400 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40022400 0x400>;
+			clocks = <&rcc 0 9>;
+			status = "disabled";
+		};
+
+		gpioK:	gpio at 40022800 {
+			#gpio-cells = <1>;
+			gpio-controller;
+			compatible = "st,stm32-gpio";
+			reg = <0x40022800 0x400>;
+			clocks = <&rcc 0 10>;
+			status = "disabled";
+		};
+
 		timer2: timer at 40000000 {
 			compatible = "st,stm32-timer";
 			reg = <0x40000000 0x400>;


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