[U-Boot] [PATCH 1/6] arm/arm64: Move barrier instructions into separate header

André Przywara andre.przywara at arm.com
Sun May 8 02:36:37 CEST 2016


Hi Tom,

On 04/05/16 22:15, Andre Przywara wrote:
> Commit bfb33f0bc45b ("sunxi: mctl_mem_matches: Add missing memory
> barrier") broke compilation for the Pine64, as dram_helper.c now
> includes <asm/armv7.h>, which does not compile on arm64.

I just realized that the 2016.05 release is due anytime now.
Can we at least take this single patch still?
The current HEAD is broken for Pine64 (as buildman armv8 easily proves).
It worked before the above mentioned patch - so with 2016.05-rc3.
This patch fixes it. I ran "buildman arm armv8" on HEAD + this fix and
didn't spot any regressions (I don't have a softfp toolchain, though).

Taking this one should prevent the new board support for Pine64 to be
broken on release.

Cheers,
Andre.

> Fix this by moving all barrier instructions into a separate header
> file, which can easily be shared between arm and arm64.
> Also extend the inline assembly to take the "sy" argument, which is
> optional for ARMv7, but mandatory for v8.
> 
> This fixes compilation for 64-bit sunxi boards (Pine64).
> 
> Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> ---
>  arch/arm/include/asm/armv7.h       | 21 +-----------------
>  arch/arm/include/asm/barriers.h    | 44 ++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-sunxi/dram_helpers.c |  2 +-
>  3 files changed, 46 insertions(+), 21 deletions(-)
>  create mode 100644 arch/arm/include/asm/barriers.h
> 
> diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
> index 30e7939..423fc70 100644
> --- a/arch/arm/include/asm/armv7.h
> +++ b/arch/arm/include/asm/armv7.h
> @@ -59,26 +59,7 @@
>  #ifndef __ASSEMBLY__
>  #include <linux/types.h>
>  #include <asm/io.h>
> -
> -/*
> - * CP15 Barrier instructions
> - * Please note that we have separate barrier instructions in ARMv7
> - * However, we use the CP15 based instructtions because we use
> - * -march=armv5 in U-Boot
> - */
> -#define CP15ISB	asm volatile ("mcr     p15, 0, %0, c7, c5, 4" : : "r" (0))
> -#define CP15DSB	asm volatile ("mcr     p15, 0, %0, c7, c10, 4" : : "r" (0))
> -#define CP15DMB	asm volatile ("mcr     p15, 0, %0, c7, c10, 5" : : "r" (0))
> -
> -#ifdef __ARM_ARCH_7A__
> -#define ISB	asm volatile ("isb" : : : "memory")
> -#define DSB	asm volatile ("dsb" : : : "memory")
> -#define DMB	asm volatile ("dmb" : : : "memory")
> -#else
> -#define ISB	CP15ISB
> -#define DSB	CP15DSB
> -#define DMB	CP15DMB
> -#endif
> +#include <asm/barriers.h>
>  
>  /*
>   * Workaround for ARM errata # 798870
> diff --git a/arch/arm/include/asm/barriers.h b/arch/arm/include/asm/barriers.h
> new file mode 100644
> index 0000000..37870f9
> --- /dev/null
> +++ b/arch/arm/include/asm/barriers.h
> @@ -0,0 +1,44 @@
> +/*
> + * Copyright (C) 2016 ARM Ltd.
> + *
> + * ARM and ARM64 barrier instructions
> + * split from armv7.h to allow sharing between ARM and ARM64
> + *
> + * Original copyright in armv7.h was:
> + * (C) Copyright 2010 Texas Instruments, <www.ti.com> Aneesh V <aneesh at ti.com>
> + *
> + * Much of the original barrier code was contributed by:
> + *   Valentine Barshak <valentine.barshak at cogentembedded.com>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +#ifndef __BARRIERS_H__
> +#define __BARRIERS_H__
> +
> +#ifndef __ASSEMBLY__
> +
> +#ifndef CONFIG_ARM64
> +/*
> + * CP15 Barrier instructions
> + * Please note that we have separate barrier instructions in ARMv7
> + * However, we use the CP15 based instructtions because we use
> + * -march=armv5 in U-Boot
> + */
> +#define CP15ISB	asm volatile ("mcr     p15, 0, %0, c7, c5, 4" : : "r" (0))
> +#define CP15DSB	asm volatile ("mcr     p15, 0, %0, c7, c10, 4" : : "r" (0))
> +#define CP15DMB	asm volatile ("mcr     p15, 0, %0, c7, c10, 5" : : "r" (0))
> +
> +#endif /* !CONFIG_ARM64 */
> +
> +#if defined(__ARM_ARCH_7A__) || defined(CONFIG_ARM64)
> +#define ISB	asm volatile ("isb sy" : : : "memory")
> +#define DSB	asm volatile ("dsb sy" : : : "memory")
> +#define DMB	asm volatile ("dmb sy" : : : "memory")
> +#else
> +#define ISB	CP15ISB
> +#define DSB	CP15DSB
> +#define DMB	CP15DMB
> +#endif
> +
> +#endif	/* __ASSEMBLY__ */
> +#endif	/* __BARRIERS_H__ */
> diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c
> index e0c823a..20b430f 100644
> --- a/arch/arm/mach-sunxi/dram_helpers.c
> +++ b/arch/arm/mach-sunxi/dram_helpers.c
> @@ -7,7 +7,7 @@
>   */
>  
>  #include <common.h>
> -#include <asm/armv7.h>
> +#include <asm/barriers.h>
>  #include <asm/io.h>
>  #include <asm/arch/dram.h>
>  
> 



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