[U-Boot] [PATCH 2/2] armv8: fsl-layerscape: SMP support for loading 32-bit OS

[York Sun]

On 05/13/2016 04:15 AM, Alexander Graf wrote:
> 
> 
> On 13.05.16 10:40, Alison Wang wrote:
>> Spin-table method is used for secondary cores to load 32-bit OS. The
>> architecture information will be got through checking FIT image and
>> saved in the os_arch element of spin-table, then the secondary cores
>> will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
>>
>> Signed-off-by: Alison Wang <alison.wang at nxp.com>
>> Signed-off-by: Chenhui Zhao <chenhui.zhao at nxp.com>
>> ---
>>  arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S  | 21 +++++++++++++++++++++
>>  arch/arm/cpu/armv8/fsl-layerscape/mp.c        | 10 ++++++++++
>>  arch/arm/include/asm/arch-fsl-layerscape/mp.h |  6 ++++++
>>  arch/arm/lib/bootm.c                          |  5 +++++
>>  4 files changed, 42 insertions(+)
>>
>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
>> index 04831ca..85d1d4b 100644
>> --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
>> @@ -13,6 +13,7 @@
>>  #ifdef CONFIG_MP
>>  #include <asm/arch/mp.h>
>>  #endif
>> +#include <asm/u-boot.h>
>>  
>>  ENTRY(lowlevel_init)
>>  	mov	x29, lr			/* Save LR */
>> @@ -320,6 +321,11 @@ ENTRY(secondary_boot_func)
>>          gic_wait_for_interrupt_m x0, w1
>>  #endif
>>  
>> +	ldr	x5, [x11, #24]
>> +	ldr	x6, =IH_ARCH_DEFAULT
>> +	cmp	x6, x5
>> +	b.ne	slave_cpu
>> +
>>  	bl secondary_switch_to_el2
>>  #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
>>  	bl secondary_switch_to_el1
>> @@ -337,6 +343,21 @@ slave_cpu:
>>  	tbz     x1, #25, cpu_is_le
>>  	rev     x0, x0                  /* BE to LE conversion */
>>  cpu_is_le:
>> +
>> +	ldr	x5, [x11, #24]
>> +	ldr	x6, =IH_ARCH_DEFAULT
>> +	cmp	x6, x5
>> +	b.eq	1f
>> +
>> +#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
>> +	bl	secondary_switch_to_el2
>> +	ldr	x0, [x11]
>> +	bl	armv8_switch_to_el1_aarch32
>> +#else
>> +	bl	armv8_switch_to_el2_aarch32
>> +#endif
> 
> Ah, so conditionally you also need to invoke the aarch64 variant. Why
> not just make it an actual runtime parameter to the existing function?
> 
> Also as a side remark, the "clean" solution would obviously be to
> support PSCI and just check which mode the caller was in.
> 

Alex,

Let's do it one step at a time. The patches for PSCI are under review.

York