[U-Boot] [PATCH 6/8] sunxi: Add optional logic to start cluster 1 and the associated CCI-400 ports

tpearson at raptorengineering.com tpearson at raptorengineering.com
Tue May 17 04:39:51 CEST 2016


Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 arch/arm/include/asm/arch-sunxi/prcm.h |  3 ++-
 board/sunxi/board.c                    | 49 ++++++++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h
index 556c1af..9e8a367 100644
--- a/arch/arm/include/asm/arch-sunxi/prcm.h
+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
@@ -219,7 +219,8 @@ struct sunxi_prcm_reg {
 	u32 clk_outd;		/* 0x0f0 */
 	u8 res6[0xc];		/* 0x0f4 */
 	u32 cpu_pwroff;		/* 0x100 */
-	u8 res7[0xc];		/* 0x104 */
+	u32 cluster1_cpu_pwr;	/* 0x104 */
+	u8 res7[0x8];		/* 0x108 */
 	u32 vdd_sys_pwroff;	/* 0x110 */
 	u8 res8[0x4];		/* 0x114 */
 	u32 gpu_pwroff;		/* 0x118 */
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 3cf3614..65029ab 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -20,6 +20,7 @@
 #include <asm/arch/dram.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/prcm.h>
 #include <asm/arch/usb_phy.h>
 #ifndef CONFIG_ARM64
 #include <asm/armv7.h>
@@ -30,6 +31,18 @@
 #include <net.h>
 #include <sy8106a.h>

+/* CCI-400 registers */
+struct cci400_control {
+	uint32_t unused0[0x3];
+	uint32_t status;
+	uint32_t unused1[0xffc];
+	uint32_t snoop_ctrl_a7;
+	uint32_t sha_ord_a7;
+	uint32_t unused2[0x3fe];
+	uint32_t snoop_ctrl_a15;
+	uint32_t sha_ord_a15;
+};
+
 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
 /* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */
 int soft_i2c_gpio_sda;
@@ -122,6 +135,42 @@ int board_init(void)
 	gpio_direction_output(CONFIG_MACPWR, 1);
 #endif

+#ifdef CONFIG_ENABLE_CLUSTER_1
+        struct sunxi_prcm_reg *prcm =
+		(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+	clrbits_le32(&prcm->cluster1_cpu_pwr, 0x1);
+#endif
+
+#ifdef CONFIG_ENABLE_CCI400_SNOOP_CLUSTERS_0_1
+	printf("Enabling snoop controls...");
+	struct cci400_control *cci = (struct cci400_control *)SUN8I_CCI400_BASE;
+	uint32_t snoop_ctl;
+
+	/* Set up cluster 0 CCI port */
+	snoop_ctl = readl(&cci->snoop_ctrl_a7);
+	snoop_ctl |= CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN;
+	writel(snoop_ctl, &cci->snoop_ctrl_a7);
+
+	/* Wait for snoop control change to take effect */
+	while (readl(&cci->status) & 0x1);
+
+	/* Set up cluster 1 CCI port */
+	snoop_ctl = readl(&cci->snoop_ctrl_a15);
+	snoop_ctl |= CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN;
+	writel(snoop_ctl, &cci->snoop_ctrl_a15);
+
+	/* Wait for snoop control change to take effect */
+	while (readl(&cci->status) & 0x1);
+
+	/* Force non-sharable memory */
+	writel(CCI400_SHAORD_NON_SHAREABLE, &cci->sha_ord_a7);
+	writel(CCI400_SHAORD_NON_SHAREABLE, &cci->sha_ord_a15);
+
+	/* Synchronize CCI enable */
+	__asm__ volatile ("dsb\n");
+	printf("done!\n");
+#endif
+
 	/* Uses dm gpio code so do this here and not in i2c_init_board() */
 	return soft_i2c_board_init();
 }
-- 
2.8.0.rc3



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