[U-Boot] [PATCH 4/8] sun8i: Add TZPC setup for A83t
Chen-Yu Tsai
wens at csie.org
Wed May 18 04:07:47 CEST 2016
On Wed, May 18, 2016 at 3:25 AM, Timothy Pearson
<tpearson at raptorengineering.com> wrote:
> On 05/17/2016 12:27 AM, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Tue, May 17, 2016 at 10:39 AM, <tpearson at raptorengineering.com> wrote:
>>
>> Description please.
>>
>>> Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
>>> ---
>>> arch/arm/cpu/armv7/sunxi/Makefile | 1 +
>>> arch/arm/cpu/armv7/sunxi/tzpc.c | 10 ++++++++++
>>> arch/arm/include/asm/arch-sunxi/tzpc.h | 10 ++++++++++
>>> arch/arm/mach-sunxi/board.c | 2 +-
>>> 4 files changed, 22 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
>>> index 4d2274a..4dd449b 100644
>>> --- a/arch/arm/cpu/armv7/sunxi/Makefile
>>> +++ b/arch/arm/cpu/armv7/sunxi/Makefile
>>> @@ -11,6 +11,7 @@ obj-y += timer.o
>>>
>>> obj-$(CONFIG_MACH_SUN6I) += tzpc.o
>>> obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o
>>> +obj-$(CONFIG_MACH_SUN8I_A83T) += tzpc.o
>>>
>>> ifndef CONFIG_SPL_BUILD
>>> ifdef CONFIG_ARMV7_PSCI
>>> diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c
>>> index 6c8a0fd..7723853 100644
>>> --- a/arch/arm/cpu/armv7/sunxi/tzpc.c
>>> +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c
>>> @@ -24,4 +24,14 @@ void tzpc_init(void)
>>> writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
>>> writel(SUN8I_H3_TZPC_DECPORT2_ALL, &tzpc->decport2_set);
>>> #endif
>>> +
>>> +#ifdef SUN8I_A83T_TZPC_DECPORT0_ALL
>>> + /* Emable non-secure access to RAM */
>>> + writel(R0SIZE, &tzpc->r0size);
>>
>> Why would you do that? That defeats the whole purpose of having the secure
>> monitor running in secure SRAM.
>>
>
> It still reserves 64k as secure per other sunxi devices. Do we need
> more secure RAM than the 64k?
Actually that register is read-only (and just tested it myself).
It just indicates how large the secure SRAM is, you can't really
change it.
ChenYu
>
>>> +
>>> + /* Enable non-secure access to all peripherals */
>>> + writel(SUN8I_A83T_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
>>> + writel(SUN8I_A83T_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
>>> + writel(SUN8I_A83T_TZPC_DECPORT2_ALL, &tzpc->decport2_set);
>>> +#endif
>>
>> And move this block above H3's block.
>>
>>> }
>>> diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h
>>> index 95c55cd..bcf0713 100644
>>> --- a/arch/arm/include/asm/arch-sunxi/tzpc.h
>>> +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h
>>> @@ -29,6 +29,16 @@ struct sunxi_tzpc {
>>> #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff
>>> #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f
>>>
>>> +#define SUN8I_A83T_TZPC_DECPORT0_ALL 0xbe
>>> +#define SUN8I_A83T_TZPC_DECPORT1_ALL 0x7f
>>> +#define SUN8I_A83T_TZPC_DECPORT2_ALL 0x10
>>
>> A83T before H3.
>>
>>> +
>>> +/*
>>> + * TZPC Register Value :
>>> + * R0SIZE: 0x10 : Size of secured ram (64Kib)
>>> + */
>>> +#define R0SIZE 0x10
>>
>> Where did this come from?
>
> This is the value for 64k per the datasheet.
>
>>> +
>>> void tzpc_init(void);
>>>
>>> #endif /* _SUNXI_TZPC_H */
>>> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
>>> index 20149da..4e0f7f9 100644
>>> --- a/arch/arm/mach-sunxi/board.c
>>> +++ b/arch/arm/mach-sunxi/board.c
>>> @@ -183,7 +183,7 @@ void s_init(void)
>>> "orr r0, r0, #1 << 6\n"
>>> "mcr p15, 0, r0, c1, c0, 1\n");
>>> #endif
>>> -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
>>> +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 || defined CONFIG_MACH_SUN8I_A83T
>>
>> A83T comes before H3.
>>
>> ChenYu
>>
>>> /* Enable non-secure access to some peripherals */
>>> tzpc_init();
>>> #endif
>>> --
>>> 2.8.0.rc3
>>>
>>> _______________________________________________
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>
>
> --
> Timothy Pearson
> Raptor Engineering
> +1 (415) 727-8645 (direct line)
> +1 (512) 690-0200 (switchboard)
> https://www.raptorengineering.com
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